Abstract: This disclosure relates generally to directional couplers. In one embodiment, a directional coupler includes a first port, a second port, a third port, a first inductive element, a second inductive element, a first switchable path, and a second switchable path. The first inductive element is coupled between the first port and the second port, while the second inductive element is mutually coupled to the first inductive element. The first switchable path is configured to be opened and closed, wherein the first switchable path is coupled between a first location of the second inductive element and the third port. The second switchable path is configured to be opened and closed, wherein the second switchable path is coupled between a second location of the second inductive element and the third port. In this manner, a directivity of the directional coupler can be switched between a forward direction and a reverse direction.

Abstract: Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved.

Abstract: This disclosure relates generally to directional couplers. In one embodiment, a directional coupler includes a first port, a second port, a third port, a first inductive element, a second inductive element, a first switchable path, and a second switchable path. The first inductive element is coupled between the first port and the second port, while the second inductive element is mutually coupled to the first inductive element. The first switchable path is configured to be opened and closed, wherein the first switchable path is coupled between a first location of the second inductive element and the third port. The second switchable path is configured to be opened and closed, wherein the second switchable path is coupled between a second location of the second inductive element and the third port. In this manner, a directivity of the directional coupler can be switched between a forward direction and a reverse direction.

Abstract: A phase shifting stage is disclosed. The phase shifting stage includes first and second transistors. Second terminals of the first transistor and the second transistor are coupled to a first current tail node. A third transistor and a fourth transistor have second terminals that are coupled to a second current tail node. Also included is a first transformer having a primary winding with first and second inputs and a secondary winding. The first input is coupled to the first terminals of the first and third transistors, and the second input is coupled to the first terminals of the second and the fourth transistors. A common input stage having high power gain and phase commutating cascode stages in asymmetrical transformer output demultiplexing (ATODEM) branches is also provided. The common input stage limits the noise generated at an input stage by substantially canceling out the noise at an output transformer of the ATODEM.

Abstract: Antenna tuning switch circuitry includes an input port, a shunt switch, control circuitry, and an integrated ground. The shunt switch is coupled between the input port and the integrated ground. The control circuitry includes a control signal input port, a switch driver output port coupled to the shunt switch, and a ground connection port coupled to the integrated ground. The shunt switches, the RF input ports, the control circuitry, and the integrated ground are monolithically integrated on a single semiconductor die. The antenna tuning switch circuitry is adapted to selectively couple the input port to the integrated ground in order to alter one or more operating parameters of an attached antenna. By monolithically integrating the shunt switch together with the control circuitry and the integrated ground, the ON state impedance and the parasitic OFF state impedance of the antenna tuning switch circuitry can be significantly improved.

Abstract: An asymmetrical transformer output demultiplexing (ATODEM) circuit is disclosed. The ATODEM circuit of the present disclosure includes N input windings, wherein N is a natural number. Each of the N input windings have input terminals that couple to output terminals of N PAs. The ATODEM further includes M output ports wherein M is a natural number, each of the M output ports having N series coupled windings coupled between a load terminal and a return terminal. The physical attributes of the N input windings, and the N series coupled windings of the M output ports are asymmetrical such that in an Nth operation mode an Nth PA first-load line impedance matches an output impedance of an Nth PA coupled to the input terminals.

Abstract: An asymmetrical transformer output demultiplexing (ATODEM) circuit is disclosed. The ATODEM circuit of the present disclosure includes N input windings, wherein N is a natural number. Each of the N input windings have input terminals that couple to output terminals of N PAs. The ATODEM further includes M output ports wherein M is a natural number, each of the M output ports having N series coupled windings coupled between a load terminal and a return terminal. The physical attributes of the N input windings, and the N series coupled windings of the M output ports are asymmetrical such that in an Nth operation mode an Nth PA first-load line impedance matches an output impedance of an Nth PA coupled to the input terminals.

Abstract: A phase shifting stage is disclosed. The phase shifting stage includes first and second transistors. Second terminals of the first transistor and the second transistor are coupled to a first current tail node. A third transistor and a fourth transistor have second terminals that are coupled to a second current tail node. Also included is a first transformer having a primary winding with first and second inputs and a secondary winding. The first input is coupled to the first terminals of the first and third transistors, and the second input is coupled to the first terminals of the second and the fourth transistors. A common input stage having high power gain and phase commutating cascode stages in asymmetrical transformer output demultiplexing (ATODEM) branches is also provided. The common input stage limits the noise generated at an input stage by substantially canceling out the noise at an output transformer of the ATODEM.

Abstract: An asymmetrical transformer output demultiplexing (ATODEM) circuit is disclosed. The ATODEM circuit of the present disclosure includes N input windings, wherein N is a natural number. Each of the N input windings have input terminals that couple to output terminals of N PAs. The ATODEM further includes M output ports wherein M is a natural number, each of the M output ports having N series coupled windings coupled between a load terminal and a return terminal. The physical attributes of the N input windings, and the N series coupled windings of the M output ports are asymmetrical such that in an Nth operation mode an Nth PA first-load line impedance matches an output impedance of an Nth PA coupled to the input terminals.

Abstract: An asymmetrical transformer output demultiplexing (ATODEM) circuit is disclosed. The ATODEM circuit of the present disclosure includes N input windings, wherein N is a natural number. Each of the N input windings have input terminals that couple to output terminals of N PAs. The ATODEM further includes M output ports wherein M is a natural number, each of the M output ports having N series coupled windings coupled between a load terminal and a return terminal. The physical attributes of the N input windings, and the N series coupled windings of the M output ports are asymmetrical such that in an Nth operation mode an Nth PA first-load line impedance matches an output impedance of an Nth PA coupled to the input terminals.