Abstract: An operation method of a proximity sensor comprises: controlling a light-emitting element by a processing circuit. Such control includes a plurality of light source on and light source off operations. An optical sensor receives light and outputs a sensing signal corresponding to the intensity of the light. The processing circuit computes the sensing signal to produce a sensing result. The plurality of light source on and light source off operations includes a group having two light sources on operations and two light sources off operations. The two light sources on operations in the group or the two light sources off operations in the group are performed consecutively. In this way, the ambient light components of the light source on and off operations may cancel out each other to reduce the ambient light components contained in the sensing results.

Abstract: A light sensor circuit, which comprising a photodiode and a voltage follower. By setting the voltage follower to reduce the influence from the junction capacitance of the photodiode, a required time of a repeat integration module will not be influenced by the photodiode to efficiently keep the performance and the accuracy of the analog to digital converting device when the light sensor circuit is used to the analog to digital converting device in repeat operation.

Abstract: An operation method of a proximity sensor comprises: controlling a light-emitting element by a processing circuit. Such control includes a plurality of light source on and light source off operations. An optical sensor receives light and outputs a sensing signal corresponding to the intensity of the light. The processing circuit computes the sensing signal to produce a sensing result. The plurality of light source on and light source off operations includes a group having two light sources on operations and two light sources off operations. The two light sources on operations in the group or the two light sources off operations in the group are performed consecutively. In this way, the ambient light components of the light source on and off operations may cancel out each other to reduce the ambient light components contained in the sensing results.

Abstract: A light sensor circuit, which comprising a photodiode and a voltage follower. By setting the voltage follower to reduce the influence from the junction capacitance of the photodiode, a required time of a repeat integration module will not be influenced by the photodiode to efficiently keep the performance and the accuracy of the analog to digital converting device when the light sensor circuit is used to the analog to digital converting device in repeat operation.

Abstract: The present application relates to a method for operating sensing signals and the circuit thereof. An analog-to-digital converter first processes the input signal having the most significant bit (MSB DATA) data at least once. Afterwards, the analog-to-digital converter processes the input signal having the least significant bit (LSB) data and the MSB data and sums all the input signals. Thereby, the process steps of the analog-to-digital converter can be simplified and the processing time can be shortened.

Abstract: The present application relates to a method for operating sensing signals and the circuit thereof. An analog-to-digital converter first processes the input signal having the most significant bit (MSB DATA) data at least once. Afterwards, the analog-to-digital converter processes the input signal having the least significant bit (LSB) data and the MSB data and sums all the input signals. Thereby, the process steps of the analog-to-digital converter can be simplified and the processing time can be shortened.

Abstract: A sensing module includes a first sensor, for sensing a light signal to generate a first sensing signal including a first crosstalk component related to a crosstalk signal in the light signal; a second sensor, for sensing the light signal to generate a second sensing signal including a second crosstalk component related to the crosstalk signal; and an arithmetic unit, for combining the first sensing signal and the second sensing signal according to a ratio between the first crosstalk component and the second crosstalk component, to generate an output signal; wherein a distance between the first sensor and a light source generating the light signal is different from a distance between the second sensor and the light source.

Abstract: A sensing module includes a first sensor, for sensing a light signal to generate a first sensing signal including a first crosstalk component related to a crosstalk signal in the light signal; a second sensor, for sensing the light signal to generate a second sensing signal including a second crosstalk component related to the crosstalk signal; and an arithmetic unit, for combining the first sensing signal and the second sensing signal according to a ratio between the first crosstalk component and the second crosstalk component, to generate an output signal; wherein a distance between the first sensor and a light source generating the light signal is different from a distance between the second sensor and the light source.

Abstract: An analog-to-digital module includes a sampling unit, for generating an output voltage between a positive output end and a negative output end according to a positive input voltage of a positive input end and a negative input voltage of a negative input end; a comparing unit, for generating a digital output signal according to magnitude relationship between the output voltage and a reference voltage; a variable current source, for generating a variable current according to the digital output signal at the negative input end in a first period according to a control signal; a measured current source, for generating a measured current at the negative input end; and an adjusting unit, for adjusting the output voltage according to the digital output signal in a second period according to the control signal; wherein the first period does not overlap the second period.

Abstract: A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit.

Abstract: A digital to analog converter (DAC) has a plurality of transistor-resistor units connected in a string. Each of the transistor-resistor units of the DAC has a pair of transistors that are turned on/off by a pair of complementary control signals. Since the two transistors of each transistor-resistor unit are positioned symmetrically, an equivalent resistance would be determined precisely according to received digital codes, such that an output voltage of the DAC could be adjusted precisely based on the equivalent resistance.

Abstract: A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit.

Abstract: A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit.

Abstract: A digital to analog converter (DAC) has a plurality of transistor-resistor units connected in a string. Each of the transistor-resistor units of the DAC has a pair of transistors that are turned on/off by a pair of complementary control signals. Since the two transistors of each transistor-resistor unit are positioned symmetrically, an equivalent resistance would be determined precisely according to received digital codes, such that an output voltage of the DAC could be adjusted precisely based on the equivalent resistance.

Abstract: A memory is provided. The memory includes a memory cell, a clamp transistor, an inverter, a bit line, a pre-charge path and a detector and controller circuit. The memory is coupled to the clamp transistor. The clamp transistor has a first end, a second end and a control end. The inverter has an input end electrically connected to the second end of the clamp transistor and an output end electrically connected to the control end of the clamp transistor. The bit line is electrically connected to the second end of the clamp transistor and the input end of the inverter and has a bit-line voltage thereon. The pre-charge path is electrically connected to the first end of the clamp transistor through a node having a sensing voltage thereon.

Abstract: A memory is provided. The memory includes a memory cell, a clamp transistor, an inverter, a bit line, a pre-charge path and a detector and controller circuit. The memory is coupled to the clamp transistor. The clamp transistor has a first end, a second end and a control end. The inverter has an input end electrically connected to the second end of the clamp transistor and an output end electrically connected to the control end of the clamp transistor. The bit line is electrically connected to the second end of the clamp transistor and the input end of the inverter and has a bit-line voltage thereon. The pre-charge path is electrically connected to the first end of the clamp transistor through a node having a sensing voltage thereon.

Abstract: A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit.