Abstract: A slit door assembly includes a door plate, a supporting arm including a first end coupled to the door plate and a second end away from the first end, and a linkage unit including a rod member and a pin member protruding from the rod member and connecting to the second end of the supporting arm. A fillet is disposed between the pin member and the rod member. A method of operating a slit door assembly includes receiving a door plate, receiving a supporting arm coupled to the door plate, and coupling a linkage unit to the supporting arm, wherein the linkage unit includes a pin member and a rod member, the pin member is protrudes from the rod member and having a fillet. The method further includes applying a first force to the linkage unit to move the door plate from a first position to a second position.

Abstract: A slit door assembly includes a door plate; a supporting arm including a first end coupled to the door plate and a second end away from the first end; and a linkage unit including a rod member and a pin member protruding from the rod member and connecting to the second end of the supporting arm. A fillet is disposed between the pin member and the rod member. A method of operating a slit door assembly includes receiving a door plate; receiving a supporting arm coupled to the door plate; and coupling a linkage unit to the supporting arm, wherein the linkage unit includes a pin member and a rod member, the pin member is protrudes from the rod member and having a fillet. The method further includes applying a first force to the linkage unit to move the door plate from a first position to a second position.

Abstract: The present disclosure provides a system and method for predicting wafer fabrication defects resulting from plasma processing of wafers in a plasma processing chamber. The system and method include processing electromagnetic signals emitted from residual compounds peeled from the chamber walls during the plasma processing of the wafers to indirectly determine the likelihood that the wafers are incurring fabrication processing defects during the plasma processing.

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer, a buffer layer, at least one recess, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The buffer layer is present between the semiconductor substrate and the dielectric layer. The recess extends into the semiconductor substrate through the dielectric layer and the buffer layer, in which the buffer layer has a removing rate with respect to an etching process for forming the recess. The removing rate of the buffer layer is between those of the semiconductor substrate and the dielectric layer. The conductor is present in the recess.

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer, a buffer layer, at least one recess, and at least one conductor. The dielectric layer is present on the semiconductor substrate. The buffer layer is present between the semiconductor substrate and the dielectric layer. The recess extends into the semiconductor substrate through the dielectric layer and the buffer layer, in which the buffer layer has a removing rate with respect to an etching process for forming the recess. The removing rate of the buffer layer is between those of the semiconductor substrate and the dielectric layer. The conductor is present in the recess.

Abstract: A semiconductor structure includes a substrate, an imaging pixel array disposed on a first region of the substrate, a first isolation disposed in the first region, a periphery circuitry disposed on a second region of the substrate, and a second isolation disposed in the second region. The imaging pixel array has a plurality of imaging pixels configured to capture image data. The periphery circuitry has a transistor configured to receive and process the image data. The first isolation has a first depth and a first protrusion projected from a surface of the substrate. The second isolation has a second depth and a second protrusion projected from the surface of the substrate. The first protrusion has a substantially same height as the second protrusion. The first depth is different from the second depth.

Abstract: A semiconductor structure includes a substrate, an imaging pixel array disposed on a first region of the substrate, a first isolation disposed in the first region, a periphery circuitry disposed on a second region of the substrate, and a second isolation disposed in the second region. The imaging pixel array has a plurality of imaging pixels configured to capture image data. The periphery circuitry has a transistor configured to receive and process the image data. The first isolation has a first depth and a first protrusion projected from a surface of the substrate. The second isolation has a second depth and a second protrusion projected from the surface of the substrate. The first protrusion has a substantially same height as the second protrusion. The first depth is different from the second depth.

Abstract: An exhaust pipe being applied in a flat lamp is disclosed, which is comprised of an inner tube and an outer tube and is being arranged at a side of the flat lamp for pumping/exhausting gas therein/therefrom. The inner tube is fitted to a side of the flat lamp while enabling the same to be in communication with the discharge space of the flat lamp; and the outer tube, which is further in communication with the inner tube, is connected to a pumping/exhausting device. After performing a pumping/exhausting process upon the flat lamp by way of the exhaust pipe attached thereto, the exhaust pipe is fused to seal the flat lamp. Moreover, the residue of the fused exhaust pipe attached on the flat lamp will not cause the thickness of the flat lamp to increase, and the exhaust pipe of the invention will help to increase the mechanism strength at the joint of the exhaust pipe and the flat lamp.

Abstract: A flat lamp structure is disclosed. The flat lamp structure includes a gas discharge chamber, a fluorescence substance, a discharge gas, and a plurality of electrodes. The fluorescence substance is disposed on the inner wall of the gas discharge chamber, and the discharge gas is disposed in the gas discharge chamber. The electrodes are disposed on the outer wall of the gas discharge chamber, wherein the gas discharge chamber comprises a dielectric substrate, a plate, and a plurality of rods, and the plate is disposed on the upper portion of the dielectric substrate and the rods are disposed between the plate and the dielectric substrate, and the plate and the edge of dielectric are connected. Additionally, the gas discharge chamber, for example, can dispose with at least a spacer to enhance the strength of the gas discharge chamber.

Abstract: An electrode structure is provided. The electrode structure contains a first auxiliary electrode and a second auxiliary electrode, a first edge electrode and a second edge electrode disposed between the first auxiliary electrode and the second auxiliary electrode, wherein the first edge electrode forming an electrode pair with the first auxiliary electrode and having a same polarity as that of the first auxiliary electrode and the second edge electrode forming an electrode pair with the second auxiliary electrode and having a same polarity as that of the second auxiliary electrode, and at least one middle electrode disposed between the first edge electrode and the second edge electrode. The electrode structure respectively enhance an interaction between the first edge electrode and the second edge electrode and a neighboring electrode by means of the first auxiliary electrode and the second auxiliary electrode. Alternatively, the width of the edge electrode increase to be 1.

Abstract: A cold cathode fluorescent flat lamp comprising a cavity, discharge gas, a plurality of electrodes, fluorescence layer and first light control layer is provided. The cavity has a light exit plane. The discharge gas is filled inside the cavity, and the electrodes may be disposed inside the cavity or outside the cavity. The cavity is divided by the protrusions of the electrodes into a plurality of first light emitting areas and second light emitting areas. The fluorescence layer is disposed on the inner wall of the cavity. The first light control layer is disposed over the fluorescence layer corresponding to the first light emitting area and the light exit plane of the cavity for reducing the light transmittance corresponding to the first light emitting area. Therefore, the first or second light control layers can increase the brightness uniformity of the whole cold cathode fluorescent flat lamp.

Abstract: A cavity structure and a cold cathode fluorescent flat lamp using the same are provided. The cold cathode fluorescent flat lamp (CCFFL) comprises a cavity structure, at least and electrode set, a fluorescent substance and a discharge gas. The cavity structure comprises a cavity shell, a plurality of spacer and a hardening paste. The spacers are disposed in the cavity shell. The tolerance of the height of the spacers is larger than about 0.01 mm, or between about 1/20 to about ¼ of the height of the spacer. The hardening paste is disposed between the spacer and the cavity shell. The electrode set is disposed inside the cavity shell or outside the cavity shell. The fluorescent substance is disposed on the inner wall of the cavity shell. The discharge gas is filled inside the cavity shell.

Abstract: A flat lamp. The flat lamp comprises an upper glass plate, a bottom glass plate, at least one glass sidewall, two long electrodes, two front glass sleeves and two rear glass sleeves. The upper glass plate, the bottom glass plate and the glass sidewalls form a closed space. The two long electrodes are parallel and extend through the front glass sleeves into the closed space. Support from the rear glass sleeve prevents electrode bending.

Abstract: A flat lamp structure is disclosed. The flat lamp structure comprises a gas discharge chamber, a fluorescence substance, a discharge gas, and a plurality of electrodes. The fluorescence substance is disposed on the inner wall of the gas discharge chamber, and the discharge gas is disposed in the gas discharge chamber. The electrodes are disposed on the outer wall of the gas discharge chamber, wherein the gas discharge chamber comprises a dielectric substrate, a plate, and a plurality of rods, and the plate is disposed on the upper portion of the dielectric substrate and the rods are disposed between the plate and the dielectric substrate, and the plate and the edge of dielectric are connected. Additionally, the gas discharge chamber, for example, can dispose with at least a spacer to enhance the strength of the gas discharge chamber.