Abstract: The present invention provides afirst dielectric layer, a stop layer and a second dielectric layer arethen formed on the conductive layer disposed on a semiconductor substrate, respectively. By performing a first lithography/etching process to etch portions of the second dielectric layer in a predetermined area, a wire trench is formed in the predetermined area in the second dielectric layer. A first barrier layer is then formed to cover both a surface of the wire trenchand a surface of the second dielectric layer. By performing a second lithography/etching process to etch through the first barrier layer and the first dielectric layer down to the conductive layer, a via is formed at a bottom of the wire trench. A second barrier layer is formed thereafter to cover both a wall and a bottom of the via, and to cover the first barrier layer. Finally, an etching back process is performed to etch the second barrier layer down to the surface of the conductive layer.