Patents by Inventor Jerald N. Hall

Jerald N. Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6434632
    Abstract: A tenant processor module is shown comprising a processor core, a plurality of strapping devices, and an input bus. The plurality of strapping devices are configured to indicate configuration information to a receiving circuit board assembly coupled to the processor module. The input bus, coupled to the processor core, receives the configuration information back from the circuit board assembly and provides them to the processor core at a first time. At a second time, the input bus receives operational data from the circuit board assembly and provides them to the processor core.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: August 13, 2002
    Assignee: Intel Corporation
    Inventor: Jerald N. Hall
  • Patent number: 6256731
    Abstract: An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio.
    Type: Grant
    Filed: November 15, 1999
    Date of Patent: July 3, 2001
    Assignee: Intel Corporation
    Inventors: Jerald N. Hall, Orville H. Christeson, Mike Kinion, Sean R. Babcock, Frank L. Wildgrube, Frank E. LeClerg, John Yuratovac
  • Patent number: 6101319
    Abstract: A tenant processor module is shown comprising a processor core, a plurality of strapping devices, and an input bus. The plurality of strapping devices are configured to indicate configuration information to a receiving circuit board assembly coupled to the processor module. The input bus, coupled to the processor core, receives the configuration information back from the circuit board assembly and provides them to the processor core at a first time. At a second time, the input bus receives operational data from the circuit board assembly and provides them to the processor core.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: August 8, 2000
    Assignee: Intel Corporation
    Inventor: Jerald N. Hall
  • Patent number: 6047373
    Abstract: An apparatus includes a configuration selector that is selectively configurable to denote one of a plurality of operating modes for the apparatus, including a configuration mode. The apparatus further comprising a programmable multiplexer, a processor, a bus, and a storage medium having stored therein a basic input/output system (BIOS) equipped to operate in any one of the plurality of operating modes, including the configuration mode wherein the BIOS facilitates user programming of a plurality of operating parameters for the apparatus. The programmable multiplexer, responsive to the configuration selector, asserts a default bus/core ratio common to a plurality of processors and buses that can be employed to form the apparatus when the configuration selector is configured to denote the configuration mode of operation. The processor, coupled to the storage medium and the programmable multiplexer, operates to execute the BIOS, in a speed consistent with the asserted bus/core ratio.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: April 4, 2000
    Assignee: Intel Corporation
    Inventors: Jerald N. Hall, Orville H. Christeson, Mike Kinion, Sean R. Babcock, Frank L. Wildgrube, Frank E. LeClerg, John Yuratovac
  • Patent number: 6020751
    Abstract: A method and apparatus for testing a circuit board is disclosed. An apparatus having at least one clock source for providing a circuit board with a clock signal at a dynamically selected frequency, a storage medium storing programming instructions to control the clock source(s) to provide the clock signal at the dynamically selected frequency including a frequency that exceeds the specified operating range of frequencies for the circuit board, and for implementing parametric testing of the circuit board, and an execution unit coupled to the clock source and to the storage medium for executing the programming instructions. The programming instructions for implementing the parametric testing of the circuit board include instructions for testing the circuit board while the circuit board is supplied with the clock signal at the frequency that exceeds the operating frequency of the circuit board, thereby stressing the circuit board.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: February 1, 2000
    Assignee: Intel Corporation
    Inventors: Thomas A. Rampone, Jerald N. Hall
  • Patent number: 5968140
    Abstract: A programmable configuration selector is provided to an apparatus having at least one configurable device. The programmable configuration selector comprises a non-volatile memory having at least one storage register for storing configuration information corresponding to the at least one configurable device, and a multiplexer driver. The multiplexer driver comprises at least one output port coupled to the at least one configurable device, for asserting configuration information, received from the non-volatile memory, on the at least one output port to configure the at least one configurable device at a first time, and for asserting operational data, received from a data bus, on the at least one output port to the at least one configurable device at a second time.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: October 19, 1999
    Assignee: INTEL Corporation
    Inventor: Jerald N. Hall
  • Patent number: 5802074
    Abstract: A method and apparatus for the non-invasive testing of printed circuit board assemblies is described herein. In a first embodiment, an apparatus for testing circuit board assemblies includes a plurality of configuration selectors, a first plurality of ports, a first plurality of traces corresponding to the plurality of configuration selectors and coupled between the configuration selectors and the ports, and a second plurality of traces coupled to the first plurality of traces. In operation, the first plurality of ports place electrical signals of a first state on the first plurality of traces at a first time, and a second state at a second time.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: September 1, 1998
    Assignee: Intel Corporation
    Inventor: Jerald N. Hall
  • Patent number: 5796639
    Abstract: An apparatus for verifying the installation of strapping devices on a circuit board assembly includes a plurality of strapping devices coupled to a plurality of configurable devices, an output port coupled to the plurality of strapping devices, and a plurality of input ports, coupled to the plurality of strapping devices with a corresponding first plurality of traces each having an associated pull-up resistor tied to a positive voltage level. The output port is adapted to output electrical signals of a first state at a first time and a second state at a second time to each of the plurality of strapping devices. The plurality of input ports receive the associated output signal from the plurality of strapping devices at each of the first time and the second time via the corresponding first plurality of traces, wherein unconfigured or malfunctioning ones of the plurality of strapping devices are identified.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: August 18, 1998
    Assignee: Intel Corporation
    Inventor: Jerald N. Hall
  • Patent number: 5788509
    Abstract: A computer having a motherboard housed in a chassis having a bottom panel and a rear panel perpendicular to the bottom panel. The rear panel has a cutout therein. The motherboard is secured to the chassis in parallel with the bottom panel. The motherboard has a socket and the audio card is mounted in the socket perpendicular to the motherboard. The audio card has connectors, such as audio line-in, line-out, microphone, speaker power and game port, mounted perpendicular to the audio card such that the connectors are aligned with the cutout in the rear panel. The audio card is grounded to the chassis with an electromagnetic interference (EMI) gasket contoured to the cutout.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: August 4, 1998
    Assignee: Intel Corporation
    Inventors: Kirk Byers, Jerald N. Hall, Ravi Nagaraj, Peter Ward