Patents by Inventor Jerard Malado

Jerard Malado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PLATING INTERCONNECT FOR SILICON CHIP
    Publication number: 20170092571
    Abstract: System, method, and silicon chip package for providing connections between dies of silicon chip packages and external leads of the s silicon chip package, where the connections are formed using a pre mold etched with a trace pattern, the trace pattern providing rigid traces that connect the die with the external leads.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Jerard Malado, Antonio R. Taloban, JR.