Abstract: Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a method of forming a dual pore sensor includes providing a pattern in a surface of a substrate. Generally, the pattern features two fluid reservoirs separated by a divider wall. The method further includes depositing a layer of sacrificial material into the two fluid reservoirs, depositing a membrane layer, patterning two nanopores through the membrane layer, removing the sacrificial material from the two fluid reservoirs, and patterning one or more fluid ports and a common chamber.

Abstract: Embodiments of the present disclosure provide methods of forming solid state dual pore sensors which may be used for biopolymer sequencing and dual pore sensors formed therefrom. In one embodiment, a dual pore sensor features a substrate having a patterned surface comprising two recessed regions spaced apart by a divider wall and a membrane layer disposed on the patterned surface. The membrane layer, the divider wall, and one or more surfaces of each of the two recessed regions collectively define a first fluid reservoir and a second fluid reservoir. A first nanopore is disposed through a portion of the membrane layer disposed over the first fluid reservoir and a second nanopore is disposed through a portion of the membrane layer disposed over the second fluid reservoir. Herein, opposing surfaces of the divider wall are sloped to each form an angle of less than 90° with a respective reservoir facing surface of the membrane layer.

Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.

Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.

Abstract: An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.

Abstract: A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.

Abstract: An apparatus and method are provided for integrating TSVs into devices prior to device contacts processing. The apparatus includes a semiconducting layer; one or more CMOS devices mounted on a top surface of the semiconducting layer; one or more TSVs integrated into the semiconducting layer of the device wafer; at least one metal layer applied over the TSVs; and one or more bond pads mounted onto a top layer of the at least one metal layer, wherein the at least one metal layer is arranged to enable placement of the one or more bond pads at a specified location for bonding to a second device wafer. The method includes obtaining a wafer of semiconducting material, performing front end of line processing on the wafer; providing one or more TSVs in the wafer; performing middle of line processing on the wafer; and performing back end of line processing on the wafer.

Abstract: A method is provided for bonding a die to a base technology wafer and includes: providing a device wafer having a front, back, at least one side, and at least one TSV, wherein the back contains a substrate material; providing a carrier wafer having a front, back, and at least one side; bonding the wafers using an adhesive; removing the substrate material and wet etching, from the device wafer's back side, to expose at least one metallization scheme feature; processing the device wafer's back side to create at least one backside redistribution layer; removing the device wafer from the carrier wafer; dicing the device wafer into individual die; providing a base technology wafer; coating the front of the base technology wafer with a sacrificial adhesive; placing the front of the individual die onto the front of the base technology wafer; and bonding the individual die to the base technology wafer.