Patents by Inventor Jeremias Libres

Jeremias Libres has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070054506
    Abstract: A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A metallic bump (304) made of reflowable metal is attached to each of these contact pads. An electrically insulating substrate (305) has a surface with a plurality of metallic terminal pads (306) in locations matching the locations of the device contact pads, and further a plurality of grooves (310) and humps (311) distributed between the terminal pad locations, complementing the distribution of the terminal pads. Each bump is further attached to its matching terminal pad, respectively; the device is thus interconnected with the substrate and spaced apart by a gap (320). Adherent polymeric material (330) containing inorganic fillers fills the gap substantially without voids.
    Type: Application
    Filed: March 1, 2006
    Publication date: March 8, 2007
    Inventors: Jeremias Libres, Joel Medina, Mary Miller
  • Publication number: 20070020808
    Abstract: Disclosed is a semiconductor device that includes an electrically insulating, sheet-like substrate with first and second surfaces, at least one opening, and a certain thickness. On the first surface are a plurality of electrically conductive routing strips and a plurality of contact pads; at least one of the contact pads is electrically connected with at least one of the routing strips, and may have a solder body attached. A semiconductor chip is positioned in the opening while leaving a gap to the substrate; the chip has an active surface including at least one bond pad, and a passive surface substantially coplanar with the second substrate surface. Substrate thickness and chip thickness may be substantially equal. Bonding elements bridge the gap to connect electrically bond pad and routing strip.
    Type: Application
    Filed: September 6, 2006
    Publication date: January 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Navinchandra Kalidas, Jeremias Libres, Michael Pierce
  • Publication number: 20060049522
    Abstract: A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A metallic bump (304) made of reflowable metal is attached to each of these contact pads. An electrically insulating substrate (305) has a surface with a plurality of metallic terminal pads (306) in locations matching the locations of the device contact pads, and further a plurality of grooves (310) and humps (311) distributed between the terminal pad locations, complementing the distribution of the terminal pads. Each bump is further attached to its matching terminal pad, respectively; the device is thus interconnected with the substrate and spaced apart by a gap (320). Adherent polymeric material (330) containing inorganic fillers fills the gap substantially without voids.
    Type: Application
    Filed: September 3, 2004
    Publication date: March 9, 2006
    Inventors: Jeremias Libres, Joel Medina, Mary Miller
  • Publication number: 20060033219
    Abstract: A semiconductor device comprising an electrically insulating, sheet-like substrate (301) with first and second surfaces (301a, 301b), at least one opening (310), and a certain thickness (302). On the first surface are a plurality of electrically conductive routing strips and a plurality of contact pads (330); at least one of the contact pads is electrically connected with at least one of the routing strips, and may have a solder body (901) attached. A semiconductor chip (102) is positioned in the opening while leaving a cap (311) to the substrate; the chip has an active surface (102a) including at least one bond pad (103), and a passive surface (102b) substantially coplanar with the second substrate surface (301b). Substrate thickness and chip thickness may be substantially equal. Bonding elements (501) bridge the gap to connect electrically bond pad and routing strip.
    Type: Application
    Filed: August 10, 2004
    Publication date: February 16, 2006
    Inventors: Navinchandra Kalidas, Jeremias Libres, Michael Pierce
  • Publication number: 20050093170
    Abstract: An integrated interconnect package for a semiconductor die and a method for assembling the die into the integrated interconnect package. The method may comprise placing the active face of the die onto an adhesive disposed on a sacrificial carrier, and applying an encapsulant over the backside of the die, forming a substantially rigid assembly structure. The assembly structure is separated from the adhesive, and an insulating material is applied to the active face of the die and patterned by a photolithography operation, creating at least one opening through the insulating material for exposing at least one die bond pad. A conductive material is then applied over the insulating material, flowing into the openings to contact the bond pads. The conductive material is then patterned by a photolithography operation, removing at least a portion of the conductive material to create a plurality of electrical traces and package terminals.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 5, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: Navinchandra Kalidas, Jeremias Libres