Abstract: An apparatus comprises a non-associative memory comprising a plurality of storage locations, and error recovery storage to store at least one error recovery entry providing a recovery value for a corresponding storage location of the non-associative memory. Control circuitry is responsive to a non-associative memory read request specifying a target address of a storage location of the non-associative memory, when the error recovery storage includes a valid matching error recovery entry for which the corresponding storage location is the storage location identified by the target address, to return the recovery value stored in the valid matching error recovery entry as a response to the non-associative memory read request, instead of information stored in the storage location identified by the target address. This enables the apparatus to continue to function even if hard errors occur in a storage location of the non-associative memory.

Abstract: A method for estimating the affinity ? of a first DNA strand, or “probe”, to be hybridized with a second DNA strand, or “target”, to form a hybrid of length Lbp, the method comprising: in each division of a set of M divisions of the hybrid, counting the number of times in which each hybrid of a set of P DNA strand hybrids is present in the division, the hybrids being of length k less than the length Lbp, or “k-hybrids”; for each combination of mismatches of a set of L combinations of mismatches in a hybrid of length Lbp, determining whether the pair of mismatches is present in the hybrid; and calculating the affinity ? according to the relation: ? = ? m = 1 M ? ? p = 1 P ? x m , p · ? ^ m , p + ? .

Abstract: Apparatus comprises memory circuitry having a plurality of addressable memory entries storing respective data items and associated error protection codes; memory error protection circuitry to generate the error protection code for a data item stored to the memory circuitry, the error protection code for a given data item stored to the memory circuitry depending upon at least the given data item and a memory address defining a memory entry to which the given data item is stored, and to perform a check operation to check for consistency between a retrieved data item, the memory address defining a memory entry from which the given data item is retrieved and the error protection code associated with the retrieved data item; memory built-in self-test circuitry to test the memory and memory error protection circuitry; and access circuitry to provide an indirect access path between the memory built-in self-test circuitry a memory which accesses the memory circuitry via the memory error protection circuitry and a dir

Abstract: Apparatus comprises memory circuitry having a plurality of addressable memory entries storing respective data items and associated error protection codes; memory error protection circuitry to generate the error protection code for a data item stored to the memory circuitry, the error protection code for a given data item stored to the memory circuitry depending upon at least the given data item and a memory address defining a memory entry to which the given data item is stored, and to perform a check operation to check for consistency between a retrieved data item, the memory address defining a memory entry from which the given data item is retrieved and the error protection code associated with the retrieved data item; memory built-in self-test circuitry to test the memory and memory error protection circuitry; and access circuitry to provide an indirect access path between the memory built-in self-test circuitry a memory which accesses the memory circuitry via the memory error protection circuitry and a dir

Abstract: An apparatus comprises a non-associative memory comprising a plurality of storage locations, and error recovery storage to store at least one error recovery entry providing a recovery value for a corresponding storage location of the non-associative memory. Control circuitry is responsive to a non-associative memory read request specifying a target address of a storage location of the non-associative memory, when the error recovery storage includes a valid matching error recovery entry for which the corresponding storage location is the storage location identified by the target address, to return the recovery value stored in the valid matching error recovery entry as a response to the non-associative memory read request, instead of information stored in the storage location identified by the target address. This enables the apparatus to continue to function even if hard errors occur in a storage location of the non-associative memory.

Abstract: Disclosed are methods, systems and devices for operation of memory device. In one aspect, bit positions of a portion of a memory array may be placed in a first value state. Values to be written to the bit positions may be determined subsequent to placement of the bit positions in the first value state. Values at selected ones of the bit positions may then be changed from the first value state to a second value state while maintaining remaining unselected ones of the bit positions in the first value state so that the bit positions store or represent the values determined to be written to the bit positions.

Abstract: A data processing apparatus comprises at least one memory configured to store data; processing circuitry to access data in the at least one memory. Memory built-in self-test (MBIST) circuitry has an interface to access the at least one memory and is configured to perform a test procedure for testing at least one target memory location of the at least one memory. The test procedure involves at least writing test data to the target memory location. Diagnostic circuitry executes a diagnostic procedure to generate diagnostic data in response to processing operations carried out by the processing circuitry. The MBIST circuitry is configured to control writing of the diagnostic data generated by the diagnostic circuitry to memory locations in a temporarily reserved memory region comprising at least a portion of the at least one memory.

Abstract: Disclosed are methods, systems and devices for operation of memory device. In one aspect, bit positons of a portion of a memory array may be placed in a first value state. Values to be written to the bit positions may be determined subsequent to placement of the bit positions in the first value state. Values at selected ones of the bit positions may then be changed from the first value state to a second value state while maintaining remaining unselected ones of the bit positions in the first value state so that the bit positions store or represent the values determined to be written to the bit positions.

Abstract: A data processing apparatus comprises at least one memory configured to store data; processing circuitry to access data in the at least one memory; memory built-in self-test (MBIST) circuitry having an interface to access the at least one memory and being configured to perform a test procedure for testing at least one target memory location of the at least one memory, the test procedure comprising at least writing test data to the target memory location; and diagnostic circuitry to execute a diagnostic procedure to generate diagnostic data in response to processing operations carried out by the processing circuitry; in which the MBIST circuitry is configured to control writing of the diagnostic data generated by the diagnostic circuitry to memory locations in a temporarily reserved memory region comprising at least a portion of the at least one memory.

Abstract: Present embodiments provide an automated system for laying pipe which includes various clearing functions in order to clear impingements and jams of pipe being fed to a conveyor or other structure while dispensing the pipe from the trailer. Some embodiments include uprights which are adjustable to increase the carrying capacity of piping. Other embodiments provide adjustable members which raise and lower to aid in clearing the pipe. Other embodiments provide a gate or arm which may be actuated to push or hold pipes back allowing one pipe to feed at a time. Still further, a transition cradle may be utilized to hold pipes back and actuate a single pipe. These features allow for clearing of various types of jams in the feed process so that a single pipe may be cleanly actuated to a conveyor for feeding from the vehicle.

Abstract: A data processing apparatus includes a memory and memory protection circuitry for providing an operational path to the memory during operational use of the memory. A memory built-in self-test controller 34 performs built-in self-test operations upon the memory using either an indirect test access path to the memory via the memory protection circuitry or a direct test access path to the memory which bypasses the memory protection circuitry. Thus, the correct operation of the memory protection circuitry itself can be tested in addition to the correct operation of the memory.

Abstract: A method for estimating the affinity ? of a first DNA strand, or “probe”, to be hybridized with a second DNA strand, or “target”, to form a hybrid of length Lbp, the method comprising: in each division of a set of M divisions of the hybrid, counting the number of times in which each hybrid of a set of P DNA strand hybrids is present in the division, the hybrids being of length k less than the length Lbp, or “k-hybrids”; for each combination of mismatches of a set of L combinations of mismatches in a hybrid of length Lbp, determining whether the pair of mismatches is present in the hybrid; and calculating the affinity ? according to the relation: ? = ? m = 1 M ? ? p = 1 P ? x m , p · ? ^ m , p + ?

Abstract: A data processing apparatus has at least one memory and processing circuitry. A memory built-in self-test (MBIST) interface receives a MBIST request indicating that a test procedure is to be performed for testing at least one target memory location. Control circuitry detects the MBIST request and reserves for testing at least one reserved memory location including the target memory location. During the test procedure, the memory continues servicing memory transactions issued by the processing circuitry that target a memory location other than the reserved location reserved by the control circuitry. The processing circuitry is stalled if it attempts to access a reserved memory location. Testing consists of short bursts of transactions which occur infrequently. In this way, MBIST testing may continue while the processor is operation in the field with reduced performance impact.

Abstract: A data processing apparatus has at least one memory and processing circuitry. A memory built-in self-test (MBIST) interface receives a MBIST request indicating that a test procedure is to be performed for testing at least one target memory location. Control circuitry detects the MBIST request and reserves for testing at least one reserved memory location including the target memory location. During the test procedure, the memory continues servicing memory transactions issued by the processing circuitry that target a memory location other than the reserved location reserved by the control circuitry. The processing circuitry is stalled if it attempts to access a reserved memory location. Testing consists of short bursts of transactions which occur infrequently. In this way, MBIST testing may continue while the processor is operation in the field with reduced performance impact.

Abstract: A tube over tube joint for an implement frame includes a self-fixturing weldable connector positioned between upper and lower tubes. Standard fillet welds connect the tubes to the connector. A unitary casting can be used made from material selected to optimize load transfer between the top and bottom tubes to improve the fatigue life of the joint. The casting is self-fixturing so the top tubes can be located by simply placing in the casting on the lower tubes. A tube end connector provides fixturing and weld surfaces for butt joints in planar frames. Outwardly extended weld edges on the connector increase resistance to parallelogramming of the frame.

Abstract: A tube over tube joint for an implement frame includes a self-fixturing weldable connector positioned between upper and lower tubes. Standard fillet welds connect the tubes to the connector. A unitary casting can be used made from material selected to optimize load transfer between the top and bottom tubes to improve the fatigue life of the joint. The casting is self-fixturing so the top tubes can be located by simply placing in the casting on the lower tubes. A tube end connector provides fixturing and weld surfaces for butt joints in planar frames. Outwardly extended weld edges on the connector increase resistance to parallelogramming of the frame.

Abstract: A tube over tube joint for an implement frame includes a self-fixturing weldable connector positioned between upper and lower tubes. Standard fillet welds connect the tubes to the connector. A unitary casting can be used made from material selected to optimize load transfer between the top and bottom tubes to improve the fatigue life of the joint. The casting is self-fixturing so the top tubes can be located by simply placing in the casting on the lower tubes. A tube end connector provides fixturing and weld surfaces for butt joints in planar frames. Outwardly extended weld edges on the connector increase resistance to parallelogramming.

Abstract: Rolling basket structure facilitating movement of the rolling device to and from a field-working position includes arm structure pivotally connected to the aft end of tine support members fixed to the rear of the implement frame. Hydraulic cylinders connected between the support members and the arm structure provides quick on-the-go disengagement of the rolling basket with the ground, for example, when wet or sticky ground conditions or the like are encountered. A cylinder lost motion connection facilitates movement of the baskets over ground irregularities and obstacles without operation of the cylinders.

Abstract: A flexible cutterbar support apparatus with integral adjustable torsional preload mechanism for connecting a cutterbar support arm to a header frame for upward and downward movement. The mechanism includes a first element connected to the support arm and extending about a second element configured for connection to the frame, and at least one resilient biasing element disposed between the first element and the second element and biasable by generation of a torsional loading condition between the first and second elements for applying a preload force therebetween. A preload adjusting mechanism in connection with at least one of the first element and the second element is operable for selectably adjusting the biasing of the at least one resilient biasing element in a manner for adjusting the preload force. The preload mechanism is also operable for damping vibrations emanating from the cutterbar, and can be used in cooperation with apparatus for damping the up and down movements thereof.

Abstract: A bearing block assembly includes a liner having a two piece ring of low friction material extending around the rockshaft and held in place by a bearing block. The rockshaft includes a radially projecting member interacting with the bearing block assembly to maintain the axial position of the rockshaft. The bearing liner includes a flange extending beyond the bearing block to contact the projecting member. The flange is seated in a groove at the side of the bearing block and lowers the coefficient of friction at the rockshaft/thrust surface interface.