Patents by Inventor Jeremy Buan

Jeremy Buan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220200587
    Abstract: A method of manufacturing an electrical system for reducing differential-to-differential far end crosstalk (DDFEXT) includes converting a first S parameter representative of a design of a first electrical system into a differential-only S parameter, generating a second differential-only S parameter configured to add even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter of the electrical system such that a total even-mode propagation delay and odd-mode propagation delay of the differential-only S parameter are substantially equivalent, and reconfiguring a second electrical system from the differential-only S parameter and the second differential-only S parameter.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Inventors: Ching-Chao HUANG, Jeremy BUAN, Jingqian TIAN, Tadashi OHSHIDA
  • Publication number: 20220038083
    Abstract: Example implementations described herein are directed to reducing far end cross talk (FEXT), including differential-to-differential far end crosstalk (DDFEXT) or single ended FEXT through generating and applying a delay shifter/inverter that is cascaded onto a target electrical system and shifts the even-mode and odd-mode propagation delay of a target electrical system to be substantially equal, which in turn reduces FEXT in the overall system.
    Type: Application
    Filed: June 25, 2021
    Publication date: February 3, 2022
    Inventors: Ching-Chao HUANG, Jeremy BUAN, Jingqian TIAN, Tadashi OHSHIDA
  • Publication number: 20210389642
    Abstract: Example implementations described herein are directed to an interface configured to redirect light between a connector connected to a printed optical board (POB) via an optical waveguide, and a photonic integrated circuit (PIC), the interface involving two-dimensionally distributed waveplates (TDWs) having multiple layers of p-doped and n-doped silicon, the TDWs configured to be driven to change a dielectric constant at a two dimensional location on the TDWs such that the received light is redirected at the two dimensional location.
    Type: Application
    Filed: May 26, 2021
    Publication date: December 16, 2021
    Inventors: Kihong KIM, Jeremy BUAN, Tsutomu MATSUO, Tadashi OHSHIDA
  • Publication number: 20210325608
    Abstract: Example implementations described herein are directed to a system involving one or more photonic integrated circuits having multi-mode waveguides and connected to a printed optical board through the use of multi-mode waveguide connectors described herein. The printed optical board can include an embedded multi-mode waveguide bus to facilitate optical signal to and from the photonic integrated circuits. The system can also include a chiplet such as a photonic integrated circuit with a single mode waveguide configured to connect to an optical fiber cable.
    Type: Application
    Filed: March 29, 2021
    Publication date: October 21, 2021
    Inventors: Kihong KIM, Jeremy BUAN, Tadashi OHSHIDA, Tsutomu MATSUO, Shuji SUZUKI, Nobuhiro TAMAI, Hiromichi MURAOKA
  • Patent number: 10756465
    Abstract: The first terminals have contact arm portions extending in a rectilinear manner in the direction of connector plugging and unplugging; the second terminals have convex contact point portions contactable with an intermediate portion of the contact arm portions in the same direction. When the stub portions of the contact arm portions are divided into a free end side range and a proximal end side range such that the center point of said stub portions in the direction of plugging and unplugging forms a boundary, in the arranged state of the first terminals, impedance at arbitrary locations in the direction of plugging and unplugging within the free end side range is larger than impedance at arbitrary locations in the plugging direction within the proximal end side range.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: August 25, 2020
    Assignee: HIROSE ELECTRIC CO., LTD.
    Inventors: Nobuhiro Tamai, Shota Yamada, Clement Kam Lam Luk, Jeremy Buan, Ching-Chao Huang, Tadashi Ohshida
  • Publication number: 20200083622
    Abstract: The first terminals have contact arm portions extending in a rectilinear manner in the direction of connector plugging and unplugging; the second terminals have convex contact point portions contactable with an intermediate portion of the contact arm portions in the same direction. When the stub portions of the contact arm portions are divided into a free end side range and a proximal end side range such that the center point of said stub portions in the direction of plugging and unplugging forms a boundary, in the arranged state of the first terminals, impedance at arbitrary locations in the direction of plugging and unplugging within the free end side range is larger than impedance at arbitrary locations in the plugging direction within the proximal end side range.
    Type: Application
    Filed: September 6, 2019
    Publication date: March 12, 2020
    Inventors: Nobuhiro TAMAI, Shota YAMADA, Clement Kam Lam LUK, Jeremy BUAN, Ching-Chao HUANG, Sunao OSHIDA
  • Patent number: 10249989
    Abstract: Example implementations described herein are directed to a method and apparatus for improving insertion loss of connector stub and thereby increasing a system's signal bandwidth. This technique shapes the connector stub in a specific way to shift its resonant frequency higher while having equal or better electrical performance below the original resonant frequency.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: April 2, 2019
    Assignee: HIROSE ELECTRIC CO., LTD.
    Inventors: Clement Luk, Jeremy Buan, Tadashi Ohshida, Ching-Chao Huang
  • Publication number: 20180261961
    Abstract: Example implementations described herein are directed to a method and apparatus for improving insertion loss of connector stub and thereby increasing a system's signal bandwidth. This technique shapes the connector stub in a specific way to shift its resonant frequency higher while having equal or better electrical performance below the original resonant frequency.
    Type: Application
    Filed: January 24, 2018
    Publication date: September 13, 2018
    Inventors: Clement LUK, Jeremy BUAN, Tadashi OHSHIDA, Ching-Chao HUANG
  • Patent number: 8357013
    Abstract: The present invention involves connectors for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of connectors, such as mezzanine connectors, backplane connectors, and any other connectors that can benefit from FEXT reduction.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: January 22, 2013
    Assignee: Hirose Electric Co., Ltd.
    Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata
  • Publication number: 20100183141
    Abstract: The present invention involves chip-to-chip communication systems for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of systems that can benefit from FEXT reduction.
    Type: Application
    Filed: November 5, 2009
    Publication date: July 22, 2010
    Applicant: Hirose Electric USA Inc.
    Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata
  • Publication number: 20100184307
    Abstract: The present invention involves connectors for reducing Far-End Crosstalk (FEXT) through the use of novel polarity swapping to negate the cumulative effect of FEXT. Skew adjustment is used to improve the FEXT cancellation from polarity swapping. The polarity reversal location or locations among FEXT sources are optimized to achieve maximum FEXT cancellation. The novelty polarity swapping technique can be applied to a wide variety of connectors, such as mezzanine connectors, backplane connectors, and any other connectors that can benefit from FEXT reduction.
    Type: Application
    Filed: November 5, 2009
    Publication date: July 22, 2010
    Applicant: Hirose Electric USA Inc.
    Inventors: Tatsuya Arai, Ching-Chao Huang, Clement Kam Lam Luk, Jeremy Buan, Tsutomu Matsuo, Toshiyuki Takada, Masakazu Nagata