Patents by Inventor Jeremy Charles Smith

Jeremy Charles Smith has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9379098
    Abstract: An integrated circuit includes first and second terminals. The integrated circuit further includes a first plurality of diodes arranged in series between the first terminal and a power supply terminal and a second plurality of diodes arranged in series between the second terminal and the power supply terminal. The integrated circuit also includes a conductor configured to couple a first node within the first plurality of diodes to a second node within the second plurality of diodes. The first node is located between a first diode of the first plurality of diodes and a last diode of the first plurality of diodes, and the second node is located between a first diode of the second plurality of diodes and a last diode of the second plurality of diodes.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: June 28, 2016
    Assignee: Silicon Laboratories Inc.
    Inventor: Jeremy Charles Smith
  • Publication number: 20140035091
    Abstract: An integrated circuit includes first and second terminals. The integrated circuit further includes a first plurality of diodes arranged in series between the first terminal and a power supply terminal and a second plurality of diodes arranged in series between the second terminal and the power supply terminal. The integrated circuit also includes a conductor configured to couple a first node within the first plurality of diodes to a second node within the second plurality of diodes. The first node is located between a first diode of the first plurality of diodes and a last diode of the first plurality of diodes, and the second node is located between a first diode of the second plurality of diodes and a last diode of the second plurality of diodes.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Inventor: Jeremy Charles Smith
  • Patent number: 8630072
    Abstract: A circuit includes an input terminal and an electrostatic discharge (ESD) protection circuit. The ESD protection circuit includes a diode string formed from a plurality of P-N junction devices arranged in series. The diode string includes an input coupled to the input terminal and includes at least one output coupled to a power supply terminal. The circuit further includes a plurality of shunt elements. Each of the plurality of shunt elements includes a first terminal coupled to one of the plurality of P-N junction devices and a second terminal coupled to the power supply terminal. Each of the plurality of shunt elements is controllable to selectively couple the one of the plurality of P-N junction devices to the power supply terminal to distribute current flow across the diode string in response to an ESD event.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: January 14, 2014
    Assignee: Silicon Laboratories Inc.
    Inventor: Jeremy Charles Smith
  • Patent number: 8520347
    Abstract: An integrated circuit includes a plurality of terminals, an unterminated diode string formed from a plurality of P-N junction devices arranged in series and coupled to the plurality of terminals, and a plurality of switches. Each of the plurality of switches includes a first terminal coupled to an anode of one of the plurality of P-N junction devices and a second terminal coupled to a power supply terminal, and is controllable to selectively couple the anode to the power supply terminal in response to an ESD event. The plurality of switches configured to dissipate an ESD current associated with the ESD event and dynamically terminate the unterminated diode string at a node where the ESD current falls below a turn-on threshold of a next P-N junction device in the unterminated diode string.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: August 27, 2013
    Assignee: Silicon Laboratories Inc.
    Inventor: Jeremy Charles Smith
  • Publication number: 20130027834
    Abstract: An integrated circuit includes a plurality of terminals, an unterminated diode string formed from a plurality of P-N junction devices arranged in series and coupled to the plurality of terminals, and a plurality of switches. Each of the plurality of switches includes a first terminal coupled to an anode of one of the plurality of P-N junction devices and a second terminal coupled to a power supply terminal, and is controllable to selectively couple the anode to the power supply terminal in response to an ESD event. The plurality of switches configured to dissipate an ESD current associated with the ESD event and dynamically terminate the unterminated diode string at a node where the ESD current falls below a turn-on threshold of a next P-N junction device in the unterminated diode string.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Inventor: Jeremy Charles Smith
  • Publication number: 20130027822
    Abstract: A circuit includes an input terminal and an electrostatic discharge (ESD) protection circuit. The ESD protection circuit includes a diode string formed from a plurality of P-N junction devices arranged in series. The diode string includes an input coupled to the input terminal and includes at least one output coupled to a power supply terminal. The circuit further includes a plurality of shunt elements. Each of the plurality of shunt elements includes a first terminal coupled to one of the plurality of P-N junction devices and a second terminal coupled to the power supply terminal. Each of the plurality of shunt elements is controllable to selectively couple the one of the plurality of P-N junction devices to the power supply terminal to distribute current flow across the diode string in response to an ESD event.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Inventor: Jeremy Charles Smith
  • Patent number: 7385383
    Abstract: Methods and systems are provided for determining efficacy of stress protection circuitry. The methods and systems employ a ring oscillator that models at least one parameter of a functional circuit to be protected by the stress protection circuit. A stress signal is applied to the ring oscillator and parametric degradation is measured to determine the effectiveness of the stress protection circuit in protecting the ring oscillator. A stress signal can be a voltage or current that stresses the normal operation of a functional circuit. The parametric degradation of the ring oscillator can be correlated to the parametric degradation that would be experienced by the functional circuit.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: June 10, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Vijay Kumar Reddy, Gianluca Boselli, Jeremy Charles Smith
  • Patent number: 7292421
    Abstract: Methods and circuits are disclosed for providing distributed ESD protection switchable between a capacitive decoupling state and an ESD protection state. The invention provides electronic circuitry with a selectable capacitive decoupling path and an ESD shunting path responsive to the detection of the presence or absence of an electrostatic discharge event. Circuits of the invention include one or more control circuits, electrostatic discharge devices, and control nodes operably coupled to responsively switch the circuit from a decoupling state to an electrostatic discharge state.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: November 6, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Jeremy Charles Smith
  • Patent number: 7196890
    Abstract: Electrostatic discharge protection circuitry includes a timing circuit operably coupled between the high supply side and low supply side of an associated circuit. The timing circuit has an RC node used for triggering a series of inverters configured to control an ESD dissipation device operably coupled to the high supply side node and the low side supply node of the circuit. A feedback transistor network and a feedback conditioning network is provided for ensuring that the ESD device is held on during an ESD event.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: March 27, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Jeremy Charles Smith