Patents by Inventor Jeremy Cure

Jeremy Cure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Three-part nano-catalyst and use thereof for photocatalysis
    Patent number: 11446649
    Abstract: Disclosed is a nanocatalyst-type nanoscale composition including a nanoparticle semiconductor, plasmonic metal nanoparticles and an organic photosensitiser of the carbo-mer type. Also disclosed is a method for producing such a nano-catalyst. Also disclosed is use of the nanocatalyst for photoelectrolysis, in particular, for the photoelectrolysis of water, as well as to a power source including the nanocatalyst.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: September 20, 2022
    Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, UNIVERSITÉ DE RENNES 1, UNIVERSITÉ PAUL SABATIER TOULOUSE III
    Inventors: Jérémy Cure, Myrtil Kahn, Kévin Cocq, Gérald Casterou, Rémi Chauvin, Valérie Maraval, Hala Assi
  • THREE-PART NANO-CATALYST AND USE THEREOF FOR PHOTOCATALYSIS
    Publication number: 20190255517
    Abstract: Disclosed is a nanocatalyst-type nanoscale composition including a nanoparticle semiconductor, plasmonic metal nanoparticles and an organic photosensitiser of the carbo-mer type. Also disclosed is a method for producing such a nano-catalyst. Also disclosed is use of the nanocatalyst for photoelectrolysis, in particular, for the photoelectrolysis of water, as well as to a power source including the nanocatalyst.
    Type: Application
    Filed: October 16, 2017
    Publication date: August 22, 2019
    Inventors: Jérémy CURE, Myrtil KHAN, Kévin COCQ, Gérald CASTEROU, Rémi CHAUVIN, Valérie MARAVAL, Hala ASSI
  • Electric connection element manufacturing method
    Patent number: 9460960
    Abstract: A surface of a silicon substrate is coated with a silicon oxide layer. A manganese silicate layer is then deposited on the silicon oxide layer using a process of performing at least one step of dipping the substrate into a manganese amidinate solution. A copper layer is then deposited on the manganese silicate layer using a process of performing a step of dipping the substrate into a copper amidinate solution. An anneal is performed to stabilize one or both of the manganese silicate layer and copper layer.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: October 4, 2016
    Assignees: STMICROELECTRONICS (TOURS) SAS, Centre National de la Recherche Scientifique-CNRS
    Inventors: Kilian Piettre, Pierre Fau, Jeremy Cure, Bruno Chaudret
  • ELECTRIC CONNECTION ELEMENT MANUFACTURING METHOD
    Publication number: 20160064278
    Abstract: A surface of a silicon substrate is coated with a silicon oxide layer. A manganese silicate layer is then deposited on the silicon oxide layer using a process of performing at least one step of dipping the substrate into a manganese amidinate solution. A copper layer is then deposited on the manganese silicate layer using a process of performing a step of dipping the substrate into a copper amidinate solution. An anneal is performed to stabilize one or both of the manganese silicate layer and copper layer.
    Type: Application
    Filed: August 28, 2015
    Publication date: March 3, 2016
    Applicants: STMICROELECTRONICS (TOURS) SAS, Centre National de la Recherche Scientifique - CNRS
    Inventors: Kilian Piettre, Pierre Fau, Jeremy Cure, Bruno Chaudret