Patents by Inventor Jeremy D. Stover

Jeremy D. Stover has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7913027
    Abstract: A configurable storage array controller can be configured to either a single-processor configuration or a multi-processor configuration by configuring a data bus switch system.
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: March 22, 2011
    Assignee: LSI Corporation
    Inventors: John R. Kloeppner, Jeremy D. Stover, Dennis E. Gates, Jason M. Stuhlsatz, Robert E. Stubbs, Mohamad El-Batal
  • Publication number: 20100257301
    Abstract: A configurable storage array controller can be configured to either a single-processor configuration or a multi-processor configuration by configuring a data bus switch system.
    Type: Application
    Filed: April 7, 2009
    Publication date: October 7, 2010
    Applicant: LSI CORPORATION
    Inventors: John R. Kloeppner, Jeremy D. Stover, Dennis E. Gates, Jason M. Stuhlsatz, Robert E. Stubbs, Mohamad El-Batal
  • Patent number: 7177942
    Abstract: The present invention discloses a system for adjusting the speed of operation of a channel for communicating with disk drives in a multi ported system, comprising a bridge controller having a first channel and a second channel and a plurality of enclosure services modules, each having a first channel connected in sequence from a bridge controller to a first enclosure services module and successively connected to successive enclosure services modules to a last enclosure services module and each having a second channel connected in reverse sequence from the bridge controller to the last enclosure services module and successively connected to the successive enclosure services modules to the first enclosure services module.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: February 13, 2007
    Assignee: LSI Logic Corporation
    Inventors: James A. Lynn, Jeremy D. Stover, Jason M. Stuhsatz, Dan A. Riedl, Timothy Flynn
  • Patent number: 7024328
    Abstract: Structures and methods for non-intrusive testing of communication signals exchanged between two circuit boards via an intermediate interconnect board. In one aspect hereof, the functional signal normally exchanged between the circuits is latched during the exchange of test signals and the latched functional signal is utilized within the circuit that normally receives the functional signal to continue normal operations. In another aspect hereof, the test signals are exchanged over a dedicated test signal path between the two circuits. In another aspect hereof, the test signals are exchanged over the functional signal paths as out of band signals.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: April 4, 2006
    Assignee: LSI Logic Corporation
    Inventors: Keith W. Holt, Jeremy D. Stover, Andrew A Cottrell
  • Patent number: 6732201
    Abstract: A system has a plurality of enclosures. Each enclosure has two enclosure services modules. Each enclosure services module has an IN port and an EXPANSION port. Each enclosure services module is able to determine the data rate of incoming data and check the validity of this data. If the data rate is other than what the enclosure services module is set for, the data rate of the enclosure services module is changed to that of the incoming data. In the system, there are a disk array controller having a first channel and a second channel. The first channel is formed in sequence from a disk array controller to a first enclosure services module of a first enclosure and between first enclosure services modules of successive enclosures to a last enclosure. The second channel is formed in reverse sequence from the disk array controller to the second enclosure services module of the last enclosure and between second enclosure services modules of successive enclosures to the first enclosure.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: May 4, 2004
    Assignee: LSI Logic Corporation
    Inventors: Jeremy D. Stover, Jason M. Stuhlsatz
  • Publication number: 20030115387
    Abstract: A system has a plurality of enclosures. Each enclosure has two enclosure services modules. Each enclosure services module has an IN port and an EXPANSION port. Each enclosure services module is able to determine the data rate of incoming data and check the validity of this data. If the data rate is other than what the enclosure services module is set for, the data rate of the enclosure services module is changed to that of the incoming data. In the system, there are a disk array controller having a first channel and a second channel. The first channel is formed in sequence from a disk array controller to a first enclosure services module of a first enclosure and between first enclosure services modules of successive enclosures to a last enclosure. The second channel is formed in reverse sequence from the disk array controller to the second enclosure services module of the last enclosure and between second enclosure services modules of successive enclosures to the first enclosure.
    Type: Application
    Filed: December 17, 2001
    Publication date: June 19, 2003
    Inventors: Jeremy D. Stover, Jason M. Stuhlsatz
  • Patent number: 6366965
    Abstract: Methods and associated apparatus for generating and maintaining a unique identity for an enclosure in a storage system. Where an enclosure compliant with storage industry standards is to maintain a unique identity, methods of the present invention are operable to coordinate use of redundant devices within the enclosure that serve, among other functions, to store and report the unique identity of the enclosure. The redundant devices (i.e., environmental service cards or modules) assure that the enclosure identity remains unique among such enclosures despite hot or cold swaps of the redundant devices among the several enclosures. A change number portion of the unique identity value stored in each of the redundant devices is updated (i.e., incremented) each time a change in the configuration of redundant devices is detected by the devices. An incumbent one of the redundant devices reports the unique identity for the enclosure in response to attached system requests.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: April 2, 2002
    Assignee: LSI Logic Corporation
    Inventors: Charles D. Binford, Jeremy D. Stover
  • Patent number: 6055228
    Abstract: A loop isolation circuit (LIC) to enable subdivision of a single daisy-chained communication loop (e.g., FC-AL) into smaller loops and to enable joining of smaller loops into a single larger loop. An LIC comprises essentially two multiplexors configured so as to permit controlled subdivision or joining of two loop portions. In a first selected state, the LIC subdivides a communication loop in which it is inserted into two loops. This configuration sacrifices accessibility among some devices previously on the larger loop for the benefit of enhanced bandwidth and reduced overhead due to node count. Bandwidth is enhanced by enabling simultaneous operation of two (or more) loop portions for establishing and communicating over logical circuit connections. However, when a failure of a redundant loop precludes access to devices, the LIC may be set to a second state to rejoin previously subdivided loops into a larger loop. This configuration restores access among all devices sharing common access to the larger loop.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: April 25, 2000
    Assignee: LSI Logic Corporation
    Inventors: Rodney A. DeKoning, Charles D. Binford, Jeremy D. Stover
  • Patent number: 5991891
    Abstract: A method and apparatus for providing loop coherency between a multiplicity of nodes. The disclosed technique and apparatus utilize a primary loop for nominal data communications and a normally unutilized secondary loop. A loop coherency circuit detects a loop incoherency condition which results in a interruption of the primary loop. The loop coherency circuit reroutes the flow of data to a secondary loop segment and back to a primary loop segment to provide a continuous coherent arbitrated loop.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: November 23, 1999
    Assignee: LSI Logic Corporation
    Inventors: Dennis J. Hahn, Jeremy D. Stover