Patents by Inventor Jeremy E. Minnich

Jeremy E. Minnich has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11670612
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Grant
    Filed: February 15, 2021
    Date of Patent: June 6, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, Jeremy E. Minnich, Zhaohui Ma
  • Patent number: 11594432
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further incudes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: February 28, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20210225672
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further incudes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 22, 2021
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20210183802
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Application
    Filed: February 15, 2021
    Publication date: June 17, 2021
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH, ZHAOHUI MA
  • Patent number: 10998208
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: May 4, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20210111132
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Application
    Filed: December 22, 2020
    Publication date: April 15, 2021
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH
  • Patent number: 10879195
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: December 29, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, Jeremy E. Minnich
  • Patent number: 10700038
    Abstract: Methods and systems for inhibiting bonding materials from entering a vacuum system of a semiconductor processing tool are disclosed herein. A semiconductor processing tool configured in accordance with a particular embodiment includes a bondhead having a first port, a second port, a first channel fluidly coupled to the first port, and a second channel fluidly coupled to the second port. The first port and first channel together comprise a first opening extending through the bondhead, and the second port and second channel together comprise a second opening extending through the bondhead. The second opening at least partially surrounds the first opening. A first flow unit is coupled to the first port and is configured to withdraw air from the first opening. A second flow unit is coupled to the second port and is configured to provide fluid to or withdraw fluid from the second opening.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: June 30, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Benjamin L. McClain, Jeremy E. Minnich
  • Publication number: 20190326142
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: July 2, 2019
    Publication date: October 24, 2019
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Patent number: 10410891
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: September 10, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20190252330
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes moisture impermeable layer. The assembly includes a first substrate and a second substrate electrically connected to a surface of the first substrate. The assembly includes a layer between the two substrates with the moisture impermeable layer between the layer and the surface of the first substrate. The layer may be non-conductive film, die attach film, capillary underfill, or the like. A portion of the surface of the first substrate may include a solder mask between the moisture impermeable layer and the first substrate. The moisture impermeable layer prevents, or at least inhibits, moisture within the first substrate from potentially creating voids in the layer. The moisture impermeably layer may be a polyimide, a polyimide-like material, an epoxy, an epoxy-acrylate, parylene, vinyltriethoxysilane, or combination thereof.
    Type: Application
    Filed: February 15, 2018
    Publication date: August 15, 2019
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH
  • Publication number: 20190131272
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Brandon P. Wirz, Benjamin L. McClain, C. Alexander Ernst, Jeremy E. Minnich
  • Patent number: 10276539
    Abstract: A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 30, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Brandon P. Wirz, Benjamin L. McClain, C. Alexander Ernst, Jeremy E. Minnich
  • Publication number: 20190067053
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Application
    Filed: June 27, 2018
    Publication date: February 28, 2019
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Publication number: 20190067238
    Abstract: Methods and systems for inhibiting bonding materials from entering a vacuum system of a semiconductor processing tool are disclosed herein. A semiconductor processing tool configured in accordance with a particular embodiment includes a bondhead having a first port, a second port, a first channel fluidly coupled to the first port, and a second channel fluidly coupled to the second port. The first port and first channel together comprise a first opening extending through the bondhead, and the second port and second channel together comprise a second opening extending through the bondhead. The second opening at least partially surrounds the first opening. A first flow unit is coupled to the first port and is configured to withdraw air from the first opening. A second flow unit is coupled to the second port and is configured to provide fluid to or withdraw fluid from the second opening.
    Type: Application
    Filed: August 25, 2017
    Publication date: February 28, 2019
    Inventors: Benjamin L. McClain, Jeremy E. Minnich
  • Publication number: 20190067232
    Abstract: A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.
    Type: Application
    Filed: August 31, 2017
    Publication date: February 28, 2019
    Inventors: BRANDON P. WIRZ, BENJAMIN L. MCCLAIN, JEREMY E. MINNICH, ZHAOHUI MA
  • Patent number: 10090177
    Abstract: Systems and methods for releasing semiconductor dies during pick and place operations are disclosed. In one embodiment, a system for handling semiconductor dies comprises a support member positioned to carry at least one semiconductor die releasably attached to a support substrate. The system further includes a picking device having a pick head coupleable to a vacuum source and positioned to releasably attach to the semiconductor die at a pick station. The system still further includes a cooling member coupleable to a cold fluid source and configured to direct a cold fluid supplied by the cold fluid source toward the support substrate at the pick station. The cold fluid cools a die attach region of the substrate where the semiconductor die is attached to the substrate to facilitate removal of the semiconductor die.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: October 2, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Jeremy E. Minnich, Benjamin L. McClain, Travis M. Jensen
  • Patent number: 10043688
    Abstract: An apparatus, system, and a method of using the apparatus or system that includes a bladder positioned between tape and an adhesive layer configured to selectively connect the tape to a semiconductor device. The bladder includes one or more chambers that may be selectively expanded to move a portion of the bladder and adhesive layer away from the tape, which may enable the removal of the semiconductor device. The flow of fluid into each of the chambers may selectively expand the chambers. The chambers may have a substantially rounded upper profile or a substantially pointed upper profile. A material within the chambers may be heated to expand the chambers. A plurality of conduits may permit the flow of fluid into the chambers. The conduits may be inserted into the bladder. The chambers may be collapsed after expansion to enable the removal of a semiconductor device from the tape.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: August 7, 2018
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Jeremy E. Minnich, Brandon P. Wirz, Bret K. Street, James M. Derderian
  • Patent number: 7491570
    Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich
  • Patent number: 7476955
    Abstract: A die package having an adhesive flow restriction area. In a first embodiment, the adhesive flow restriction area is formed as a trench in a transparent element. A second embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches that extend from one edge of the transparent element to the other edge. A third embodiment has a transparent element with an adhesive flow restriction area formed as a plurality of trenches. A fourth embodiment has a transparent element with an adhesive flow restriction area formed as a protuberance. A fifth embodiment comprises a trench in the die. A sixth embodiment has a die with a plurality of trenches in the die as an adhesive flow restriction area. A seventh embodiment has a die with a protuberance.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: January 13, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, James M. Derderian, Jeremy E. Minnich