Abstract: A tri-state circuit that includes a control circuit coupled to a driver circuit. The driver circuit includes a first type of transistor connected in series with a second type of transistor. The control circuit receives an input data signal at an input data rate and a plurality of clock signals, and supplies a first signal and a second signal to the first type of transistor and the second type of transistor in response to the receipt of the input data signal. The control circuit further controls a tri-state switching operation of the first type of transistor and the second type of transistor such that the input data signal is selected and an output data signal is generated at an output data rate. The tri-state circuit is further utilized in other digital circuits, such as latch circuits, latch-based memory circuits or parallel-to-serial converter circuits to reduce inter symbol interference.

Abstract: Wide dynamic range and stability are achieved by adjusting a gain control resistance of an amplifier such that the pole ratio between the input and output is stable and by using a gain compensation technique to adjust output current. Adjustment of the gain is performed by determining a peak voltage between a gain stage and a dummy gain stage amplifier that does not amplify the input voltage. The peak voltage is compared to a gain control reference voltage and the comparison output is used to regulate both the variable gain and the gain compensation. The variable gain is performed using an FET variable resistor in a feed back loop of the amplifier. The gain compensation technique uses an FET variable resistor to adjust a voltage level of a driving transistor that adjusts an amount of current provided to an input of a current mirror. The mirrored current is then used to drain bias current from the amplifier.

Abstract: Wide dynamic range and stability are achieved by adjusting a gain control resistance of an amplifier such that the pole ratio between the input and output is stable and by using a gain compensation technique to adjust output current. Adjustment of the gain is performed by determining a peak voltage between a gain stage and a dummy gain stage amplifier that does not amplify the input voltage. The peak voltage is compared to a gain control reference voltage and the comparison output is used to regulate both the variable gain and the gain compensation. The variable gain is performed using an FET variable resistor in a feed back loop of the amplifier. The gain compensation technique uses an FET variable resistor to adjust a voltage level of a driving transistor that adjusts an amount of current provided to an input of a current mirror. The mirrored current is then used to drain bias current from the amplifier.