Abstract: A optical filter comprising a variable transmittance layer having a first spectrum in a dark state, and a second spectrum in a faded state; and a color balancing layer having a third spectrum; each of the first, second and third spectra comprising a visible portion; the first and third spectra combining to provide a dark state spectrum approximating a dark state target color; and the second and third spectra combining to provide a fades state spectrum approximating a faded state target colour. The optical filter may further comprise a light attenuating layer. The optical filter may further comprise part of a laminated glass.

Abstract: A switching material comprising one or more than one polymers and an electrolyte comprising a salt and a solvent portion comprising one or more solvents; and one or more compounds having electrochromic and photochromic properties dispersed homogeneously through the switching material; and wherein the switching material is transitionable from a light state to a dark state on exposure to UV light and from a dark state to a light state with application of an electric voltage.

Abstract: An apparatus comprising a switchable optical filter comprising a layer of switchable material, the switchable material comprising a photochromic/thermochromic, a photochromic/photochromic, or a photochromic/electrochromic compound; a first light source providing light of a wavelength that causes the switchable material to transition from a faded state to a dark state, or a dark state to a faded state; and a switch for controlling activation of the first light source

Abstract: An improved beam-defining aperture structure and method for fabrication is realized. An aperture opening is made in a thin conductive film positioned over a cavity in a support substrate, where the aperture size and shape is determined by the opening in the conductive film and not determined by the substrate.

Abstract: A compound according to Formula IA and IB, reversibly convertible under photochromic and electrochromic conditions between a ring-open isomer A and a ring-closed isomer B is provided. For substitutent groups, Z is N, O or S; each R1 is independently selected from the group consisting of H, or halo; each R2 is independently selected from the group consisting of H, halo, a polymer backbone, alkyl or aryl; or, when both R2 together form —CH?CH— and form part of a polymer backbone; each R3 is independently selected from the group consisting of H, halo, alkyl, alkoxy, thioalkyl or aryl; each R4 is aryl; and each R5 is independently selected from the group consisting of H, halo, alkyl, alkoxy, thioalkyl or aryl.

Abstract: Variable transmittance optical filters capable of transitioning from a light state to a dark state on exposure to UV radiation and from a dark state to a light state with application of an electric voltage are provided. The optical filters comprise a switching material that comprises one or more chromophores that have electrochromic and photochromic properties.

Abstract: Variable transmittance optical filters capable of transitioning from a light state to a dark state on exposure to UV radiation and from a dark state to a light state with application of an electric voltage are provided. The optical filters comprise a switching material that comprises one or more chromophores that have electrochromic and photochromic properties.

Abstract: A dirty memory is operable to store dirty indicators, each dirty indicator being settable to a given value indicative that a page of memory associated therewith has been dirtied. The dirty indicators are stored in groups with each group having associated therewith a validity indicator computed from the dirty indicator values of the group. The control logic is operable on reading a group to compute a validity indicator value based on the dirty indicator values for the group to determine the integrity of the group. The integrity can be confirmed by comparing the computed validity indicator value to a validity indicator value read for the group. Where the value read and the value computed compare equal, it can be assumed that the dirty indicator values of the group are correct. Preferably the validity indicator is a parity indicator. Although parity does not provide for error correction, parity has the advantage that minimal overhead is needed for computation and storage.

Abstract: A computer system comprising at least two processing sets. Each processing set includes main memory. A bridge connects the processing sets. At least a first processing set further including a dirty memory having dirty indicators for indicating dirtied blocks of the main memory of the first processing set. The bridge includes a direct memory access controller that is operable to copy blocks of the first processing set indicated in the dirty memory to the main memory of another processing set. The processors do not, therefore, need to carry out the copying, whereby the processor overhead associated therewith can be avoided, increasing the efficiency of memory reintegration. The direct memory access controller can be arranged to search the dirty memory for dirty indicators indicative of dirtied blocks. Alternatively, the dirty memory can include control logic operable to search the dirty memory for dirty indicators indicative of dirtied blocks.

Abstract: A dirty memory subsystem includes storage operable to store redundant copies of dirty indicators. Each dirty indicator is associated with a respective block of main memory and is settable to a predetermined state to indicate that the block of main memory associated therewith has been dirtied. By providing redundant storage for the dirty indicators, any difference between the stored copies of the dirty indicators can be considered as indicative of memory corruption, for example as a result of a cosmic ray impact. As the different copies can be stored in different locations, it is unlikely that a cosmic ray impact would affect all copies equally. If a difference between the stored copies is detected, then the dirty indicator can be take as being unreliable and remedial action can be taken. For example, it can be assumed that a block of main memory has been dirtied if any of the copies of the dirty indicator has the predetermined state.

Abstract: A system is disclosed for providing electrical power responsive to solar energy. The system includes a Si cell, an AlGaAs cell, and a Ge cell. The Si cell is for providing electrical power responsive to solar energy within a first frequency range. The AlGaAs cell is coupled to a first side of the Si cell, and is for providing electrical power responsive to solar energy within a second frequency range. The Ge cell is coupled to a second side of the Si cell, and the Ge cell provides electrical power responsive to solar energy within a third frequency range.

Abstract: Resource access control is provided in a manner that avoids unnecessary resource accesses where a resource is already known to be faulty. The resource can be a memory location, a peripheral or any other addressable system component. A resource access mechanism in a processor controls access to resources. The resource access mechanism includes an address control mechanism having a plurality of address control entries, each address control entry providing fake response identification indicating whether or not a response for the corresponding address is to be faked. The resource access mechanism also includes a fake response generator for selectively generating a faked response for an address in response to the fake response identification of the corresponding address control entry indicating that a response is to be faked.

Abstract: A memory controller controls access to one or more memory units. The memory controller includes access control logic operable to receive a memory access request that references at least one memory address. It further includes a fake response record operable to record a fake response indication for an address for which a response is to be faked. The access control logic is operable on receipt of a memory access request to access the fake response record and to fake a response where a fake response indication for an address indicates that a response is to be faked. By providing such a faked response, an embodiment of the invention is able avoid multiple exceptions for the same memory location in a CPU. Also, by providing such a faked response, multiple bus errors for a memory location can also be avoided where a bus supports Direct Memory Access (DMA). The memory controller can be implemented in an integrated circuit.

Abstract: To provide efficient resource access control in a computer system, a trap handler for handling a trap in the event of a faulty resource access being detected is arranged to define a diversion for subsequent access attempts to the same resource. An address translation mechanism is responsive to indication of a diversion for a resource access to modify an address mapping, whereby subsequent attempts to access the resource are diverted in accordance with the diversion. The trap handler can be arranged in a conventional manner to process an exception of the first faulty access to the resource. However, by defining the diversion, which can be used to map further attempts to access the same resource, unnecessary exception processing can be avoided.

Abstract: Resource access control is provided in a manner that avoids unnecessary resource accesses where a resource is already known to be faulty. A resource access controller controls access to resources addressed by at least one central processing unit. The resource access controller includes an address translation mechanism providing fake response identification as to whether or not a response is to be faked. The resource access controller also includes a fake response generator for selectively generating a faked response where the fake response identification of the corresponding translation entry indicates that a response is to be faked. The resource access controller is able to associate fake response indications with a resource and to generate a fake response when an attempt is made to access a resource labeled such that a faked response should be returned.

Abstract: A dirty memory that includes dirty indicators settable to indicate dirtied pages of memory is provided with control logic operable automatically to interrogate the dirty memory to identify dirty indicators that are set. Implementing the control of the dirty RAM in hardware or firmware enables interrogation of the dirty RAM to identify set dirty indicators in a rapid and reliable manner. The control logic can advantageously be operable to interrogate the dirty memory word-by-word to determine words including a set bit. A comparator can be provided for comparing bits of a word to a predetermined value to determine where a dirty indicator is set. The comparison could be performed serially for bits within a word, but it is advantageously done in parallel for the bits of the word. For example, by using associative memory, the interrogation of the dirty memory could be effected associatively in parallel to determine words including a word with a set bit.

Abstract: A dirty memory for a computer system is configured hierarchically. This provides for more rapid identification of pages of memory that have been dirtied and require attention. For example for the reintegration of an equivalent memory state to the memories of respective processing sets in a fault tolerant computer following a lockstep error. The dirty memory includes at least two levels. A lower level includes groups of dirty indicators, each dirty indicator being settable to a given state indicative that a page of memory associated therewith has been dirtied. At least one higher level includes dirty group indicators settable to a predetermined state indicative that a group of the lower level associated therewith has at least one dirty indicator in a state indicative that a page of memory associated therewith has been dirtied. There can be more that two layers. Logic controls the operation of the hierarchical dirty memory.

Abstract: The invention relates to a display device which comprises a printed replication of a plurality of, in the embodiment, ceramic floor tiles. The array is digitally replicated using a digital camera to provide a visual image which is a printed, four colour, replica of the floor tiles. The replica, in A5 size on a foldable substrate such as paper, can be folded to A4 and taken by a prospective purchaser to a point of intended use, such as a home, where the visual effect of the tiles can be seen without the need to take an actual tile to the point of use.

Abstract: A dirty memory is operable to store dirty indicators, each dirty indicator being settable to a given value indicative that a page of memory associated therewith has been dirtied. The dirty indicators are stored in groups with each group having associated therewith a validity indicator computed from the dirty indicator values of the group. The control logic is operable on reading a group to compute a validity indicator value based on the dirty indicator values for the group to determine the integrity of the group. The integrity can be confirmed by comparing the computed validity indicator value to a validity indicator value read for the group. Where the value read and the value computed compare equal, it can be assumed that the dirty indicator values of the group are correct. Preferably the validity indicator is a parity indicator. Although parity does not provide for error correction, parity has the advantage that minimal overhead is needed for computation and storage.

Abstract: A dirty memory subsystem includes storage operable to store redundant copies of dirty indicators. Each dirty indicator is associated with a respective block of main memory and is settable to a predetermined state to indicate that the block of main memory associated therewith has been dirtied. By providing redundant storage for the dirty indicators, any difference between the stored copies of the dirty indicators can be considered as indicative of memory corruption, for example as a result of a cosmic ray impact. As the different copies can be stored in different locations, it is unlikely that a cosmic ray impact would affect all copies equally. If a difference between the stored copies is detected, then the dirty indicator can be take as being unreliable and remedial action can be taken. For example, it can be assumed that a block of main memory has been dirtied if any of the copies of the dirty indicator has the predetermined state.