Patents by Inventor Jeremy O. Jones

Jeremy O. Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8580773
    Abstract: The present invention provides tetrahydropyrvinium (THP), derivatives thereof, benzoxazole compounds, and derivatives thereof. The present invention provides a method of using tetrahydropyrvinium (THP), derivatives thereof, benzoxazole compounds, and derivatives thereof.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: November 12, 2013
    Assignee: The Regents of the University of California
    Inventors: Marc I. Diamond, Jeremy O. Jones, Adam R. Renslo
  • Patent number: 5574874
    Abstract: A method for memory checkpointing which does not involve copying of data and that is virtually instantaneous involves designating the active location at a checkpoint as being the backup for the checkpoint. Until there is a new write operation after the checkpoint, this location is regarded as both the active and the backup location. At the first write operation after the checkpoint, the write is carried out to the other, previously non-designated location. Control of writing and indicating of the status of the locations is carried out by updating two binary bits for each pair of locations, namely, a first modification indicator bit and a second role indicator bit. The modification bits are stored on a resettable RAM for almost instantaneous checkpointing where the location granularity is that of a write operation. The method obviates the need for copying the contents of an active location at a checkpoint.
    Type: Grant
    Filed: June 16, 1995
    Date of Patent: November 12, 1996
    Assignee: Tolsys Limited
    Inventors: Jeremy O. Jones, Brian A. Coghlan, Philip O'Carroll
  • Patent number: 5394536
    Abstract: A stable memory circuit which includes a pair of memory banks (2(a)) and (2(b)) each having eight arrays of eight VRAMs (3). Each VRAM (3) is dual-ported and includes a processor port connected to a processor bus (6) and a stable memory port connected to a stable memory bus (7). Accordingly, stable memory operations such as copying operations may be carried out on the stable memory bus (7) concurrently with conventional random accesses by a host processor via the processor port (6) and with very little use of processor time. Further, the stable memory ports of VRAMs (3) are serial ports and each memory bank (2(a)) and (2(b)) may transfer data at high speed using wide serial data path.
    Type: Grant
    Filed: September 9, 1993
    Date of Patent: February 28, 1995
    Assignees: The Provost, Fellows and Scholars of Trinity College Dublin, Brian A. Coghlan, Jeremy O. Jones
    Inventors: Brian A. Coghlan, Jeremy O. Jones