Patents by Inventor Jeremy R. Gorbold
Jeremy R. Gorbold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11835584Abstract: A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.Type: GrantFiled: August 19, 2020Date of Patent: December 5, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Jeremy R. Gorbold, Paul Joseph Maher, Andreas Callanan
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Patent number: 11663100Abstract: A serial interface, such as a serial peripheral interface (SPI), with improved diagnostic coverage is disclosed. The serial interface includes a data verification module that selects an error detection value in response to a mode signal indicating if the transmitting device is in user mode or test mode. For example, the data verification module computes a cyclic redundancy check (CRC) value and selects either the computed CRC value or its inverse based on the mode. The receiving device can determine the mode of the transmitting device based on the error detection value used. The serial interface further includes a read detector for clearing the transmit data buffer after data is read out. The serial interface may further include a loopback circuit for verifying that the data output from an output pin matches the data from the transmit data buffer.Type: GrantFiled: July 21, 2020Date of Patent: May 30, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Jeremy R. Gorbold, Gavin Cosgrave, Gautham Lakkur
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Publication number: 20220057452Abstract: A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.Type: ApplicationFiled: August 19, 2020Publication date: February 24, 2022Inventors: Jeremy R. Gorbold, Paul Joseph Maher, Andreas Callanan
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Publication number: 20210374022Abstract: A serial interface, such as a serial peripheral interface (SPI), with improved diagnostic coverage is disclosed. The serial interface includes a data verification module that selects an error detection value in response to a mode signal indicating if the transmitting device is in user mode or test mode. For example, the data verification module computes a cyclic redundancy check (CRC) value and selects either the computed CRC value or its inverse based on the mode. The receiving device can determine the mode of the transmitting device based on the error detection value used. The serial interface further includes a read detector for clearing the transmit data buffer after data is read out. The serial interface may further include a loopback circuit for verifying that the data output from an output pin matches the data from the transmit data buffer.Type: ApplicationFiled: July 21, 2020Publication date: December 2, 2021Applicant: Analog Devices International Unlimited CompanyInventors: Jeremy R. Gorbold, Gavin COSGRAVE, Gautham LAKKUR
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Publication number: 20190302191Abstract: An example method to reduce data handling on lithium ion battery monitors is provided and includes receiving a request from a micro-controller for data associated with one or more cells, receiving signals corresponding to monitored properties from the cells, calculating derivative properties from the monitored properties, dividing a default data into a plurality of portions, and sending the derivative properties and one of the portions to the micro-controller according to at least a first compute logic option or a second compute logic option. The default data can include cell voltages, auxiliary inputs, stack voltage, reference output voltage, analog voltage output, analog voltage input, temperature, and reference buffer voltage. The default data is provided sequentially to the micro-controller in as many consecutive read backs as the number of portions, where each portion corresponds to the default data measured at a distinct time instant.Type: ApplicationFiled: June 20, 2019Publication date: October 3, 2019Applicant: Analog Devices Global Unlimited CompanyInventor: Jeremy R. Gorbold
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Patent number: 10365332Abstract: An example method to reduce data handling on lithium ion battery monitors is provided and includes receiving a request from a micro-controller for data associated with one or more cells, receiving signals corresponding to monitored properties from the cells, calculating derivative properties from the monitored properties, dividing a default data into a plurality of portions, and sending the derivative properties and one of the portions to the micro-controller according to at least a first compute logic option or a second compute logic option. The default data can include cell voltages, auxiliary inputs, stack voltage, reference output voltage, analog voltage output, analog voltage input, temperature, and reference buffer voltage. The default data is provided sequentially to the micro-controller in as many consecutive read backs as the number of portions, where each portion corresponds to the default data measured at a distinct time instant.Type: GrantFiled: September 24, 2013Date of Patent: July 30, 2019Assignee: ANALOG DEVICES GLOBAL UNLIMITED COMPANYInventor: Jeremy R. Gorbold
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Patent number: 10200041Abstract: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.Type: GrantFiled: November 1, 2016Date of Patent: February 5, 2019Assignee: Analog Devices GlobalInventors: Jeremy R. Gorbold, Christian Steffen Birk, Gerard Mora Puchalt, Colin Charles Price, Michael C. W. Coln, Mahesh Madhavan Kumbaranthodiyil
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Publication number: 20180123591Abstract: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled.Type: ApplicationFiled: November 1, 2016Publication date: May 3, 2018Inventors: Jeremy R. Gorbold, Christian Steffen Birk, Gerard Mora Puchalt, Colin Charles Price, Michael C.W. Coln, Mahesh Madhavan Kumbaranthodiyil
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Patent number: 9791880Abstract: Methods and apparatus to reduce localized transistor operating temperature increases in fully integrated voltage regulator circuits are provided. Transistor self-heating effects are reduced by dispersing heat more evenly over the integrated circuit die, via use of nested voltage regulator circuits and/or use of more than one transistor in a voltage regulator circuit pass device. An electrically parallel-connected group of multiple individual integrated transistors may be laid out across cooler areas of the integrated circuit die, such as in substantially linear sets or rings of devices near the outer die perimeter. Each transistor in the group may better disperse its own heat if it is thermally segregated from other self-heating devices, as through a minimum physical layout spacing. Transistor bias voltage mismatch tolerances, load currents, and routing resistances may interrelatedly determine the number of individual transistors needed in a group.Type: GrantFiled: March 16, 2016Date of Patent: October 17, 2017Assignee: Analog Devices GlobalInventors: Mahesh Madhavan Kumbaranthodiyil, Jeremy R. Gorbold
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Publication number: 20170269623Abstract: Methods and apparatus to reduce localized transistor operating temperature increases in fully integrated voltage regulator circuits are provided. Transistor self-heating effects are reduced by dispersing heat more evenly over the integrated circuit die, via use of nested voltage regulator circuits and/or use of more than one transistor in a voltage regulator circuit pass device. An electrically parallel-connected group of multiple individual integrated transistors may be laid out across cooler areas of the integrated circuit die, such as in substantially linear sets or rings of devices near the outer die perimeter. Each transistor in the group may better disperse its own heat if it is thermally segregated from other self-heating devices, as through a minimum physical layout spacing. Transistor bias voltage mismatch tolerances, load currents, and routing resistances may interrelatedly determine the number of individual transistors needed in a group.Type: ApplicationFiled: March 16, 2016Publication date: September 21, 2017Inventors: Mahesh Madhavan Kumbaranthodiyil, Jeremy R. Gorbold
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Publication number: 20160109530Abstract: Battery monitors are provided in association with battery stacks to monitor the health of individual batteries. This is important as damaged batteries present a fire risk. Usually the battery stack is assembled and connected to a multipin connector assembled and connected to a multipin connector which engages with a cooperating connector of a battery monitor. The connections have a tolerance so the connections make in a random and uncontrolled order. This disclosure provides ways of ensuring that the power supply connector connects first. This reduces voltage stress in the monitoring circuit and also allows steps to be taken to control inrush currents.Type: ApplicationFiled: October 21, 2014Publication date: April 21, 2016Applicant: ANALOG DEVICES TECHNOLOGYInventors: Jeremy R. GORBOLD, Colin Charles PRICE
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Publication number: 20140129164Abstract: An example method to reduce data handling on lithium ion battery monitors is provided and includes receiving a request from a micro-controller for data associated with one or more cells, receiving signals corresponding to monitored properties from the cells, calculating derivative properties from the monitored properties, dividing a default data into a plurality of portions, and sending the derivative properties and one of the portions to the micro-controller according to at least a first compute logic option or a second compute logic option. The default data can include cell voltages, auxiliary inputs, stack voltage, reference output voltage, analog voltage output, analog voltage input, temperature, and reference buffer voltage. The default data is provided sequentially to the micro-controller in as many consecutive read backs as the number of portions, where each portion corresponds to the default data measured at a distinct time instant.Type: ApplicationFiled: September 24, 2013Publication date: May 8, 2014Applicant: Analog Devices TechnologyInventor: Jeremy R. Gorbold