Abstract: A television receiver includes a teletext decoder having a page memory (PM) into which teletext data is read from a data acquisition circuit (DAC) via an interface circuit (MIC) under control of a microprocessor (PRO). The microprocessor is also used to control functions of the television receiver and to cause on-screen display messages to be produced. When an on-screen display message is to be produced, the microprocessor sets a bit in the memory PM which causes a latch to be set which in turn causes a multiplexer (MUX) to apply data from an auxiliary memory (APM) to a character generator (CG). When the on-screen display message is to be deleted, the bit in the page memory is reset causing the latch to be reset and the multiplexer to apply data from the page memory to the character generator. This enables on-screen display messages to be applied to the character generator without losing any of the teletext data stored in the page memory.

Abstract: A "correct page header received" (CPHR) flip-flop (3) is set by the page header of a required teletext page and reset by the next following page header, a "page end" flip-flop (15) generates a page end output (17) in response to the receipt of the next following page header, a "row received" flip-flop (11) detects at least one row of the required teletext page, a gate (14) inhibits the generation of an end of page output (21) for a predetermined period, typically corresponding to three field intervals, and an AND gate (18) further inhibits the generation of an end of page output (21) if there has been a subsequent detection of a further page header of the required teletext page within the predetermined period.