Patents by Inventor Jeremy S. Lansford

Jeremy S. Lansford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7456110
    Abstract: A method for controlling an etch process comprises providing a wafer having at least a first layer and a second layer formed over the first layer. The thickness of the second layer is measured. An etch selectivity parameter is determined based on the measured thickness of the second layer. An operating recipe of an etch tool is modified based on the etch selectivity parameter. A processing line includes an etch tool, a first metrology tool, and a process controller. The etch tool is adapted to etch a plurality of wafers based on an operating recipe, each wafer having at least a first layer and a second layer formed over the first layer. The first metrology tool is adapted to measure a pre-etch thickness of the second layer. The process controller is adapted to determine an etch selectivity parameter based on the measured pre-etch thickness of the second layer and modify the operating recipe of the etch tool based on the etch selectivity parameter.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: November 25, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeremy S. Lansford, Laura Faulk
  • Patent number: 6722942
    Abstract: Various embodiments of a planarization device and methods of using the same are provided. In one aspect, a device for planarizing a surface of a semiconductor workpiece is provided that includes a table for holding a quantity of an electrically conducting solution thereon. A member is included for holding the semiconductor workpiece such that the surface is in contact with the solution and operates as a working electrode. The member has a first conductor for establishing electrical connection with the semiconductor workpiece. A counter electrode is provided for making electrical connection with the solution and a reference electrode is provided for making electrical connection with the solution with a known electrode potential. A power source is operable to control the electric potential between the working electrode and the counter electrode. Slurry consumption may be dramatically reduced and static etch rate due to aborts may be virtually eliminated.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: April 20, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher H. Lansford, Jeremy S. Lansford, Bradley J. Yellitz
  • Patent number: 6689258
    Abstract: Various methods and apparatus for polishing semiconductor workpieces using electrochemically generated species are disclosed. In one aspect, a method of processing is provided that includes contacting a semiconductor workpiece to a solution, electrochemically generating a chemical species in the solution, and polishing the semiconductor workpiece with the aid of the solution.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: February 10, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher H. Lansford, Jeremy S. Lansford
  • Patent number: 6461878
    Abstract: A method for decreasing variations in gate electrode widths is provided. The method includes providing a wafer having a gate electrode formed thereon and an anti-reflective coating layer formed over at least a portion of the gate electrode. The gate electrode has a width. The width of the gate electrode is measured. A strip rate for a strip tool adapted to remove the anti-reflective coating is determined. The measured width of the gate electrode is compared to a target gate electrode critical dimension to determine an overetch time based on the strip rate. The operating recipe of the strip tool is modified based on the overetch time. A processing line includes a first metrology tool, a strip tool, and a process controller. The first metrology tool is adapted to measure the width of a gate electrode formed on a wafer. The gate electrode has an anti-reflective coating layer formed over at least a portion of the gate electrode. The strip tool is adapted to remove the anti-reflective coating.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: October 8, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jeremy S. Lansford
  • Patent number: 6285133
    Abstract: Various embodiments of an ion implantation apparatus are provided. In one aspect, an apparatus for implanting a workpiece with ions is provided that includes a housing enclosing a first chamber. A source of accelerated ions is provided for directing a beam of ions through the first chamber toward the workpiece. A second chamber is provided for holding the workpiece along with a plurality of longitudinally spaced chambers that are defined by the housing and a plurality of longitudinally spaced bulkheads. Each of the bulkheads has an aperture enabling fluid communication between the plurality of longitudinally spaced chambers and the passage of the beam of ions. A source of gas is coupled to the second chamber. A pumping system is provided for evacuating the first chamber, the second chamber and the plurality of longitudinally spaced chambers. The pumping system and the plurality of longitudinally spaced chambers provide an increase in pressure between the first chamber and the second chamber.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: September 4, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher H. Lansford, Jeremy S. Lansford