Abstract: A first circuit design and a second circuit design are analyzed to determine part of the second circuit design structurally similar to part of the first circuit design. A first set of test patterns for the first circuit design is modified to generate a second set of test patterns for the second circuit design by reusing values of bits in the first set of test patterns associated with the part of the first circuit design as values of bits in the second set of test patterns associated with the part of the second circuit design. Fault simulation is performed on the second circuit design using the second set of test patterns to determine a subset of faults undetectable by the second set of test patterns. Test pattern generation is performed for the subset of faults to generate a third set of test patterns for the second circuit design.