Patents by Inventor Jerome A. Imonigie
Jerome A. Imonigie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11848360Abstract: Some embodiments include an integrated assembly containing a first structure which includes one or more transition metals, and containing a second structure over the first structure. The second structure has a first region directly against the first structure and has a second region spaced from the first structure by a gap region. The second structure includes semiconductor material having at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Groups 15 and 16 of the periodic table. An ionic compound is within the gap region. Some embodiments include a method of forming an integrated assembly.Type: GrantFiled: June 17, 2021Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Yoshitaka Nakamura, Devesh Dadhich Shreeram, Yi Fang Lee, Scott E. Sills, Jerome A. Imonigie, Kaustubh Shrimali
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Patent number: 11651952Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.Type: GrantFiled: February 5, 2021Date of Patent: May 16, 2023Assignee: Micron Technology, Inc.Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel
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Publication number: 20220406899Abstract: Some embodiments include an integrated assembly containing a first structure which includes one or more transition metals, and containing a second structure over the first structure. The second structure has a first region directly against the first structure and has a second region spaced from the first structure by a gap region. The second structure includes semiconductor material having at least one element selected from Group 13 of the periodic table in combination with at least one element selected from Groups 15 and 16 of the periodic table. An ionic compound is within the gap region. Some embodiments include a method of forming an integrated assembly.Type: ApplicationFiled: June 17, 2021Publication date: December 22, 2022Applicant: Micron Technology, Inc.Inventors: Yoshitaka Nakamura, Devesh Dadhich Shreeram, Yi Fang Lee, Scott E. Sills, Jerome A. Imonigie, Kaustubh Shrimali
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Patent number: 11404267Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.Type: GrantFiled: December 30, 2019Date of Patent: August 2, 2022Assignee: Micron Technology, Inc.Inventors: Santanu Sarkar, Jerome A. Imonigie, Kent H. Zhuang, Josiah Jebaraj Johnley Muthuraj, Janos Fucsko, Benjamin E. Greenwood, Farrell M. Good
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Patent number: 11393688Abstract: Systems, methods and apparatus are provided for a semiconductor structure. An example method includes a method for forming a contact surface on a vertically oriented access devices. The method includes forming a first source/drain region and a second source/drain region vertically separated by a channel region, forming a sacrificial etch stop layer on a first side of the second source/drain region, wherein the channel region is in contact with a second side of the second source/drain region, forming a dielectric layer on a first side of the sacrificial etch stop layer, where the second source/drain region is connected to a second side of the sacrificial etch stop layer, removing the dielectric layer using a first etch process to expose the sacrificial etch stop layer, and removing the sacrificial etch stop layer using a second etch process to form a contact surface on the second source/drain region.Type: GrantFiled: August 4, 2020Date of Patent: July 19, 2022Assignee: Micron Technology, Inc.Inventors: Jerome A. Imonigie, Guangjun Yang, Anish A. Khandekar, Yoshitaka Nakamura, Yi Fang Lee
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Patent number: 11361972Abstract: Some embodiments include a method in which an assembly is formed to have a first silicon-dioxide-containing-material and a second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material has a higher concentration of dopant therein than does the second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material is selectively removed relative to the second silicon-dioxide-containing-material using a mixture which includes hydrofluoric acid, a second acid and an organic solvent. The organic solvent may include at least one ester and/or at least one ether. The second acid may have a pKa of less than about 5.Type: GrantFiled: April 18, 2019Date of Patent: June 14, 2022Assignee: Micron Technology, Inc.Inventors: Jerome A. Imonigie, Ramaswamy Ishwar Venkatanarayanan, Pranav P. Sharma, Eric E. Kron, Sanjeev Sapra
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Publication number: 20220059693Abstract: Some embodiments include an integrated assembly having an access device between a storage element and a conductive structure. The access device has channel material which includes semiconductor material. The channel material has a first end and an opposing second end, and has a side extending from the first end to the second end. The first end is adjacent the conductive structure, and the second end is adjacent the storage element. Conductive gate material is adjacent the side of the channel material. A first domed metal-containing cap is over the conductive structure and under the channel material and/or a second domed metal-containing cap is over the channel material and under the storage element. Some embodiments include methods of forming integrated assemblies.Type: ApplicationFiled: August 20, 2020Publication date: February 24, 2022Applicant: Micron Technology, Inc.Inventors: Yoshitaka Nakamura, Yi Fang Lee, Jerome A. Imonigie, Scott E. Sills, Aaron Michael Lowe
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Publication number: 20220045195Abstract: Systems, methods and apparatus are provided for a semiconductor structure. An example method includes a method for forming a contact surface on a vertically oriented access devices. The method includes forming a first source/drain region and a second source/drain region vertically separated by a channel region, forming a sacrificial etch stop layer on a first side of the second source/drain region, wherein the channel region is in contact with a second side of the second source/drain region, forming a dielectric layer on a first side of the sacrificial etch stop layer, where the second source/drain region is connected to a second side of the sacrificial etch stop layer, removing the dielectric layer using a first etch process to expose the sacrificial etch stop layer, and removing the sacrificial etch stop layer using a second etch process to form a contact surface on the second source/drain region.Type: ApplicationFiled: August 4, 2020Publication date: February 10, 2022Inventors: Jerome A. Imonigie, Guangjun Yang, Anish A. Khandekar, Yoshitaka Nakamura, Yi Fang Lee
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Patent number: 11127588Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.Type: GrantFiled: April 12, 2019Date of Patent: September 21, 2021Assignee: Micron Technology, Inc.Inventors: Sevim Korkmaz, Sanjeev Sapra, Jerome A. Imonigie, Armin Saeedi Vahdat
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Publication number: 20210202246Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.Type: ApplicationFiled: December 30, 2019Publication date: July 1, 2021Inventors: Santanu Sarkar, Jerome A. Imonigie, Kent H. Zhuang, Josiah Jebaraj Johnley Muthuraj, Janos Fucsko, Benjamin E. Greenwood, Farrell M. Good
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Publication number: 20210159069Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.Type: ApplicationFiled: February 5, 2021Publication date: May 27, 2021Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel
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Patent number: 10978306Abstract: Methods, apparatuses, and systems related to forming a recess in a semiconductor structure are described. An example method includes etching the semiconductor structure using an elevated temperature dilution of acid and water. The method further includes etching the semiconductor structure using a room temperature wet etch of acid and water and a surface modification chemistry.Type: GrantFiled: March 29, 2019Date of Patent: April 13, 2021Assignee: Micron Technology, Inc.Inventors: Jerome A. Imonigie, Adriel Jebin Jacob Jebaraj, Brian J. Kerley, Sanjeev Sapra, Ashwin Panday
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Patent number: 10916418Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.Type: GrantFiled: November 7, 2019Date of Patent: February 9, 2021Assignee: Micron Technology, Inc.Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel
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Publication number: 20200335351Abstract: Some embodiments include a method in which an assembly is formed to have a first silicon-dioxide-containing-material and a second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material has a higher concentration of dopant therein than does the second silicon-dioxide-containing-material. The first silicon-dioxide-containing-material is selectively removed relative to the second silicon-dioxide-containing-material using a mixture which includes hydrofluoric acid, a second acid and an organic solvent. The organic solvent may include at least one ester and/or at least one ether. The second acid may have a pKa of less than about 5.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Micron Technology, Inc.Inventors: Jerome A. Imonigie, Ramaswamy Ishwar Venkatanarayanan, Pranav P. Sharma, Eric E. Kron, Sanjeev Sapra
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Publication number: 20200328076Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.Type: ApplicationFiled: April 12, 2019Publication date: October 15, 2020Inventors: Sevim Korkmaz, Sanjeev Sapra, Jerome A. Imonigie, Armin Saeedi Vahdat
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Publication number: 20200312954Abstract: Methods, apparatuses, and systems related to forming a recess in a semiconductor structure are described. An example method includes etching the semiconductor structure using an elevated temperature dilution of acid and water. The method further includes etching the semiconductor structure using a room temperature wet etch of acid and water and a surface modification chemistry.Type: ApplicationFiled: March 29, 2019Publication date: October 1, 2020Inventors: Jerome A. Imonigie, Adriel Jebin Jacob Jebaraj, Brian J. Kerley, Sanjeev Sapra, Ashwin Panday
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Patent number: 10777561Abstract: Methods, apparatuses, and systems related to reduction of tapering on a sidewall of an opening are described. An example method includes forming a silicate material comprising a gradient borophosphosilicate glass (BPSG) stack on a semiconductor structure. The example method further includes etching a portion of the silicate material to form an opening within the silicate material having sidewalls, wherein the gradient BSPG stack comprises varying concentrations of boron and phosphorous to reduce tapering of the sidewalls in response to the etching.Type: GrantFiled: January 28, 2019Date of Patent: September 15, 2020Assignee: Micron Technology, Inc.Inventors: Devesh Dadhich Shreeram, Sanjeev Sapra, Masihhur R. Laskar, Darwin Franseda Fan, Jerome A. Imonigie
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Publication number: 20200243528Abstract: Methods, apparatuses, and systems related to reduction of tapering on a sidewall of an opening are described. An example method includes forming a silicate material comprising a gradient borophosphosilicate glass (BPSG) stack on a semiconductor structure. The example method further includes etching a portion of the silicate material to form an opening within the silicate material having sidewalls, wherein the gradient B SPG stack comprises varying concentrations of boron and phosphorous to reduce tapering of the sidewalls in response to the etching.Type: ApplicationFiled: January 28, 2019Publication date: July 30, 2020Inventors: Devesh Dadhich Shreeram, Sanjeev Sapra, Masihhur R. Laskar, Darwin Franseda Fan, Jerome A. Imonigie
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Publication number: 20200075316Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.Type: ApplicationFiled: November 7, 2019Publication date: March 5, 2020Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel
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Patent number: 10497558Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.Type: GrantFiled: February 26, 2018Date of Patent: December 3, 2019Assignee: Micron Technology, Inc.Inventors: Michael T. Andreas, Jerome A. Imonigie, Prashant Raghu, Sanjeev Sapra, Ian K. McDaniel