Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A multilayer ceramic repair process which provides a new electrical repair path to connect top surface vias. The repair path is established between a defective net and a redundant repair net contained within the multilayer ceramic substrate. The defective net and the repair net each terminate at surface vias of the substrate. A laser is used to form post fired circuitry on and in the substrate. This is followed by the electrical isolation of the defective net from the electrical repair structure and passivation of the electrical repair line.

Abstract: A food container fabricated from a one piece paperboard blank suitable for packaging pizza pies and the like where the container includes a tear tab which is convertible into a support for maintaining the integrity of the container.

Abstract: A method of manufacturing a silicon gate MIS device providing automatic formation and alignment of the gate structure during formation of adjacent impurity regions. In a preferred embodiment, the process is for the gate structure and source and drain of silicon gate FETs. The layered gate constituents-- typically oxide and silicon-- are formed on a semiconductor wafer. A photoresist mask which is larger than the desired gate size is formed on the silicon and the silicon is etched to a predetermined size beneath the overhanging mask. A deposition mask in the form of the photoresist mask or the gate silicon oxide and which is of the same size as the photoresist mask, is used to control the deposition of impurities within predetermined surface areas of the substrate which are spaced a predetermined distance from the silicon gate boundaries.

Abstract: An adhesion-enhancing technique for preparing the surface of a polycrystalline silicon body to receive organic photoresist. In an exemplary procedure, the polysilicon is placed in an oxygen plasma chamber operating under rf power of about 90 milliwatts per cubic centimeter of chamber volume and a pressure of approximately 1 torr for 10 minutes to form an adhesion-enhancing oxide monolayer on the polysilicon.