Patents by Inventor Jerome Enjalbert
Jerome Enjalbert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10101358Abstract: An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.Type: GrantFiled: July 3, 2013Date of Patent: October 16, 2018Assignee: NXP USA, Inc.Inventors: Emil Cozac, Jerome Enjalbert, Jalal Ouaddah
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Patent number: 9841777Abstract: A voltage regulator for digital loads combines a closed loop regulation circuit with an open loop topology. A transistor and a bank of transistors share the same voltage source VDD and gate control current. Each of the bank of transistors is sized to match different current load requirements and one or more may be switched in or out as appropriate when the digital load transitions from one operating mode to another. The regulator has good DC load regulation and unconditional stability regardless of output capacitance.Type: GrantFiled: May 29, 2013Date of Patent: December 12, 2017Assignee: NXP USA, Inc.Inventors: Jerome Enjalbert, Joachim Kruecken, Jalal Ouaddah
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Patent number: 9753064Abstract: A voltage metering module for metering a voltage signal at least one analogue to digital converter (ADC) component arranged to receive at an input thereof a voltage signal and to generate a digital signal representative of the received voltage signal. The at least one ADC component includes at least one sampling network controllable to sample the received voltage signal for conversion to a digital signal representative of the received voltage signal and at least one compensation network operably coupled in parallel with the sampling network and controllable to sample the received voltage signal such that an input current of the compensation network at least partially compensates for a component of an input current of the sampling network.Type: GrantFiled: April 22, 2013Date of Patent: September 5, 2017Assignee: NXP USA, Inc.Inventor: Jerome Enjalbert
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Patent number: 9552893Abstract: A sample-and-hold circuit is provided. The sample-and-hold circuit includes an input one or more dedicated capacitive elements, one or more parasitic capacitive elements connected to said one or more dedicated capacitive elements, an output, a group of switches, and a control unit. The control unit controls said switches so as to interconnect said input, said one or more dedicated capacitive elements, and said output in a cyclic manner in accordance with a sample-and-hold cycle.Type: GrantFiled: August 8, 2012Date of Patent: January 24, 2017Assignee: NXP USA, Inc.Inventor: Jerome Enjalbert
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Patent number: 9529374Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.Type: GrantFiled: April 30, 2013Date of Patent: December 27, 2016Assignee: NXP USA, Inc.Inventors: Jerome Enjalbert, Marianne Maleyran, Jalal Ouaddah
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Publication number: 20160139174Abstract: An on-board trimming circuit suitable for trimming an accelerometer provides offset trim and gain trim modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs which have been adjusted by successive trim codes, with a reference voltage in a comparator until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap of a feedback resistance divider circuit which forms a part of an on-board voltage reference generator which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using these reference voltages significantly lessens the impact of any offsets inherent in the voltage reference generator on the trimming process.Type: ApplicationFiled: July 3, 2013Publication date: May 19, 2016Applicant: Freescale Semiconductor, Inc.Inventors: Emil COZAC, Jerome ENJALBERT, Jalal OUADDAH
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Publication number: 20160098050Abstract: A voltage regulator for digital loads combines a closed loop regulation circuit with an open loop topology. A transistor and a bank of transistors share the same voltage source VDD and gate control current. Each of the bank of transistors is sized to match different current load requirements and one or more may be switched in or out as appropriate when the digital load transitions from one operating mode to another. The regulator has good DC load regulation and unconditional stability regardless of output capacitance.Type: ApplicationFiled: May 29, 2013Publication date: April 7, 2016Applicant: Freescale Semiconductor, Inc.Inventors: Jerome ENJALBERT, Joachim KRUECKEN, Jalal OUADDAHé
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Publication number: 20160077537Abstract: A low drop-out voltage regulator, an integrated circuit, a sensor and a method of providing a regulated voltage are provided. The low drop-out voltage regulator comprises a regulated voltage driver for providing the regulated voltage in response to a control voltage, a feedback-loop circuit for generating the control signal such that the regulated voltage driving circuit provides the regulated voltage, and a pull-up circuit for pulling up the regulated voltage to a supply voltage when a difference between the supply voltage and the control voltage is smaller than a predetermined threshold value. In the feedback-loop circuit a first feedback voltage or a second feedback voltage is generated, respectively, on basis of a first ratio and a second ratio between the feedback voltage and the regulated voltage. The second feedback voltage is generated instead of the first feedback voltage when the regulated voltage is pulled-up to the supply voltage.Type: ApplicationFiled: April 30, 2013Publication date: March 17, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: JEROME ENJALBERT, MARIANNE MALEYRAN, JALAL OUADDAH
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Publication number: 20160061867Abstract: A voltage metering module for metering a voltage signal at least one analogue to digital converter (ADC) component arranged to receive at an input thereof a voltage signal and to generate a digital signal representative of the received voltage signal. The at least one ADC component includes at least one sampling network controllable to sample the received voltage signal for conversion to a digital signal representative of the received voltage signal and at least one compensation network operably coupled in parallel with the sampling network and controllable to sample the received voltage signal such that an input current of the compensation network at least partially compensates for a component of an input current of the sampling network.Type: ApplicationFiled: April 22, 2013Publication date: March 3, 2016Applicant: Freescale Semiconductor, Inc.Inventor: Jerome ENJALBERT
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Publication number: 20150206598Abstract: A sample-and-hold circuit is provided. The sample-and-hold circuit includes an input one or more dedicated capacitive elements, one or more parasitic capacitive elements connected to said one or more dedicated capacitive elements, an output, a group of switches, and a control unit. The control unit controls said switches so as to interconnect said input, said one or more dedicated capacitive elements, and said output in a cyclic manner in accordance with a sample-and-hold cycle.Type: ApplicationFiled: August 8, 2012Publication date: July 23, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: Jerome Enjalbert
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Patent number: 8890606Abstract: A voltage switching circuitry comprises a switching arrangement with a given number N of switches in series between a first terminal receiving a first voltage and a second terminal receiving a second voltage. The first voltage level is higher than the second voltage level, and N is at least equal to 2. A voltage-by-N divider, having N?1 output taps, is arranged to divide the first voltage by N to a scaled down version of the first voltage having a voltage level below voltage max ratings of the switches. The N?1 output taps of the divider are arranged to respectively output N?1 third voltages having respective levels staged below the first voltage level. N?1 max voltage generators generate N?1 fourth voltages, respectively equal to the maximum of the second voltage and of each of the N?1 third voltages. A switch control unit generates N control signals using the N?1 fourth voltages. These N control signals have respective voltage levels staged between the first voltage level and the second voltage level.Type: GrantFiled: October 27, 2010Date of Patent: November 18, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Jerome Enjalbert, Marianne Maleyran
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Patent number: 8509857Abstract: A detector for detecting the connection of an accessory including a microphone and/or the state of a switch associated with the microphone for a mobile device, wherein the detector comprises a first flag generator for time multiplexing the detection of a signal above a predetermined threshold for each of two comparators, such that for one time period one comparator output is detected and for a second time period the second comparator output is detected to thereby form a first flag; a second flag generator for determining the connection of microphone to thereby generate a second flag; a lookup table for determining the connection of the accessory and/or the state of the microphone switch from the first and second flags.Type: GrantFiled: October 6, 2006Date of Patent: August 13, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Jerome Enjalbert
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Publication number: 20130200944Abstract: A voltage switching circuitry comprises a switching arrangement with a given number N of switches in series between a first terminal receiving a first voltage and a second terminal receiving a second voltage. The first voltage level is higher than the second voltage level, and N is at least equal to 2. A voltage-by-N divider, having N?1 output taps, is arranged to divide the first voltage by N to a scaled down version of the first voltage having a voltage level below voltage max ratings of the switches. The N?1 output taps of the divider are arranged to respectively output N?1 third voltages having respective levels staged below the first voltage level. N?1 max voltage generators generate N?1 fourth voltages, respectively equal to the maximum of the second voltage and of each of the N?1 third voltages. A switch control unit generates N control signals using the N?1 fourth voltages. These N control signals have respective voltage levels staged between the first voltage level and the second voltage level.Type: ApplicationFiled: October 27, 2010Publication date: August 8, 2013Applicant: Freescale Semiconductor, Inc.Inventors: Jerome Enjalbert, Marianne Maleyran
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Patent number: 8482099Abstract: The present invention provides a poly-resistor with an improved linearity. Majority charge carrier wells are provided under the poly-strips and are biased in such way that the non-linearity of the resistor is reduced. Further, when such poly-resistors are used in amplifier circuits, the gain of the amplifier remains constant against the poly-depletion effect.Type: GrantFiled: April 11, 2008Date of Patent: July 9, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Jerome Enjalbert
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Patent number: 8416969Abstract: An amplifier circuit comprises differential amplification circuitry comprising an input stage having first and second differential inputs, and an output stage, having respective first and second amplifier components with first and second differential outputs. The first amplifier component of the output stage comprises a first power transistor operably coupled to the first differential output and driven by a first differential output of the input stage, and a third power transistor operably coupled to the first differential output of the amplifier circuit and driven by a second output of the input stage. The second amplifier component comprises a second power transistor operably coupled to the second differential output and driven by a second output of the input stage, and a fourth power transistor operably coupled to the second differential output and driven by the first output of the input stage.Type: GrantFiled: November 15, 2007Date of Patent: April 9, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Jerome Enjalbert, Zakaria Mengad
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Patent number: 8085954Abstract: A microphone amplifier arrangement comprises at least one microphone input connected to a dual output microphone pre-amplifier having an input resistance comprising a first resistance and a second resistance in a first voltage-to-voltage mode of operation, and only the second resistance in a second current-to-voltage mode of operation. A first output is operably coupled to a first feedback path comprising a V2V feedback resistor; and a second output is operably coupled to a second feedback path comprising an I2V feedback resistor. In this manner, the microphone amplifier arrangement is arranged to support both a V2V microphone amplifier and a low-noise I2V microphone amplifier.Type: GrantFiled: July 21, 2005Date of Patent: December 27, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Ludovic Oddoart, Jerome Enjalbert
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Patent number: 8018200Abstract: In the field of battery charging for electronic devices, it is known to employ a number of measures to avoid excessive power dissipation by a pass device in a charging system. However, many of these measures are either incompatible with linear charging regimes or add cost to the adapter and/or charging system. The present invention provides a power dissipation measurement circuit for controlling a control device that acts in series with another, but maximum current limiting, control device to control drive current to the pass device so as to limit the power dissipated by the pass device to a maximum threshold value.Type: GrantFiled: February 22, 2005Date of Patent: September 13, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Jerome Enjalbert, Olivier Tico
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Publication number: 20100246858Abstract: An amplifier circuit comprises differential amplification circuitry comprising an input stage having first and second differential inputs, and an output stage, having respective first and second amplifier components with first and second differential outputs. The first amplifier component of the output stage comprises a first power transistor operably coupled to the first differential output and driven by a first differential output of the input stage, and a third power transistor operably coupled to the first differential output of the amplifier circuit and driven by a second output of the input stage. The second amplifier component comprises a second power transistor operably coupled to the second differential output and driven by a second output of the input stage, and a fourth power transistor operably coupled to the second differential output and driven by the first output of the input stage.Type: ApplicationFiled: November 15, 2007Publication date: September 30, 2010Applicant: Freescale Semiconductor, Inc.Inventors: Jerome Enjalbert, Zakaria Mengad
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Publication number: 20100029344Abstract: A detector for detecting the connection of an accessory including a microphone and/or the state of a switch associated with the microphone for a mobile device, wherein the detector comprises a first flag generator for time multiplexing the detection of a signal above a predetermined threshold for each of two comparators, such that for one time period one comparator output is detected and for a second time period the second comparator output is detected to thereby form a first flag; a second flag generator for determining the connection of microphone to thereby generate a second flag; a lookup table for determining the connection of the accessory and/or the state of the microphone switch from the first and second flags.Type: ApplicationFiled: October 6, 2006Publication date: February 4, 2010Applicant: Freescale Semiconductor, Inc.Inventor: Jerome Enjalbert
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Patent number: 7598716Abstract: A low dropout voltage regulator is described having a pass device, differential amplifiers, and a feedback loop including a low pass filter. Two differential amplifiers arranged in parallel coupled to the low pass filter in the feedback loop provide a specified and stable DC voltage whose input-to-output voltage difference is low. Improved stability, reduced die area, improved power supply rejection ratio, increased bandwidth, decreased power consumption, and better electrostatic discharge (ESD) protection may result.Type: GrantFiled: June 7, 2007Date of Patent: October 6, 2009Assignee: Freescale Semiconductor, Inc.Inventors: David Schlueter, Jerome Enjalbert