Abstract: A first capacitor has a capacitance adjustable to a set point value by application of a bias voltage. A second capacitor also has a capacitance adjustable to a set point value by application of a bias voltage. The first and second capacitors are arranged to receive the same bias voltage generated by a control circuit. The control circuit receiving the set point value as an input and generates that bias voltage in response to a quantity representative of a capacitance of the second capacitor.

Abstract: A first capacitor has a capacitance adjustable to a set point value by application of a bias voltage. A second capacitor also has a capacitance adjustable to a set point value by application of a bias voltage. The first and second capacitors are arranged to receive the same bias voltage generated by a control circuit. The control circuit receiving the set point value as an input and generates that bias voltage in response to a quantity representative of a capacitance of the second capacitor.

Abstract: A method and a system for transferring a digital signal through a transformer, in which the current in a primary winding of the transformer is a frequency-modulated signal exhibiting sinusoidal trains of different durations according to the rising or falling edge of the digital signal to be transferred.

Abstract: A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.

Abstract: A circuit for generating a D.C. signal for controlling an A.C. switch referenced to a first potential, from a high-frequency signal referenced to a second potential, including: a first capacitive element connecting a first input terminal, intended to receive the high-frequency signal, to the cathode of a rectifying element having its anode connected to a first output terminal intended to be connected to a control terminal of the switch; and a second capacitive element connecting a second input terminal, intended to be connected to the second reference potential, to a second output terminal intended to be connected to the first reference potential, a second rectifying element connecting the cathode of the first rectifying element to the second output terminal.

Abstract: A method and a system for transferring a digital signal through a transformer, in which the current in a primary winding of the transformer is a frequency-modulated signal exhibiting sinusoidal trains of different durations according to the rising or falling edge of the digital signal to be transferred.

Abstract: A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.

Abstract: The protection of an inductance of a voltage step-up converter, comprising a first switch with an inverted input logic between the inductance and a terminal of connection of a load to be supplied, the control electrode of which can be connected either to the inductance supply voltage, or to a voltage smaller than the voltage of a power electrode of said first switch, on the inductance side.

Abstract: A power converter of switched-mode type for providing a voltage to several loads, a first load being of relatively low power with respect to the power of a second load. The converter comprises a circuit for generating cut-off pulses of a D.C. voltage. The converter comprises means for selecting an operating mode from among: a first operating mode in which only the first load of relatively low power is supplied and the circuit for generating cut-off pulses regulates a voltage supplied to the first load; and a second operating mode in which both the first and the second loads are supplied, the circuit for generating cut-off pulses regulates the voltage provided to the second load, the voltage being periodically provided to the first load for a time period which is relatively short with respect to a second time period, during the second time period the voltage is provided to the second load.

Abstract: A power converter is shared between plural independent loads, by assigning to each of the loads periodic supply time windows during which the power converter is respectively dedicated thereto, the periodicity of the time windows being selected according to the remanence time of the loads.

Abstract: A method and a circuit for limiting the current in an inductance, comprising means for interrupting the power storage in the inductance at the end of a delay triggered by the current in the inductance.

Abstract: A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.

Abstract: A generator of at least one pulse width modulated signal, including: a generator of a sawtooth signal a generator of high and low reference signals defining, based on a set-point signal, a linear range of each ramp of the sawtooth signal at least one element of comparison of the sawtooth signal with each of the reference signals and at least one element of logic combination of the comparison results, providing the pulse width modulated signal.

Abstract: A controllable rectifying element, comprising a bipolar transistor having a current input terminal connected to a control terminal by a first switch and having a current output terminal connected to the control terminal by a second switch, the turn-off and turn-on phases of the first and second switches being complementary and depending on the state desired for the rectifying element.

Abstract: The invention concerns a switching circuit (20) adapted to generate a pulse when there occurs a rising edge of a signal applied on an input terminal (CTRL), comprising: a first NPN type bipolar transistor (TN2) whereof the transmitter is connected to the input terminal; a second transistor (TP2) whereof a control electrode is connected, through a first resistor (Re2), to the input terminal, the base of the first transistor being connected to a supply potential (VDD) by the second transistor in series with a second resistor (Rp2); and a third transistor (TN3) connecting an output terminal (22) of the switching circuit to a reference potential (GND) and whereof a control electrode is connected to the collector of the first transistor (TN2).