Patents by Inventor Jerome Villette

Jerome Villette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8858713
    Abstract: Disclosed is an apparatus for depositing a thin film of material on a substrate and a regeneration process. The apparatus includes a chamber, a cryogenic panel disposed inside the chamber, a sample holder able to support a substrate, a gas injector able to inject a gaseous precursor into the chamber, a first trap connected to the vacuum chamber and able to trap a part of the gaseous precursor released by the cryogenic panel, the first trap having a fixed pumping capacity S1. The apparatus for depositing a thin film of material on a substrate includes a second trap having a variable pumping capacity S2 able to be regulated in function of the gaseous precursor partial pressure, the first and second trap providing a total pumping capacity S=S1+S2 sufficient to maintain the gaseous precursor partial pressure in the vacuum chamber under a determined pressure PL.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: October 14, 2014
    Assignee: Riber
    Inventors: Jerome Villette, Valerick Cassagne, Catherine Chaix
  • Publication number: 20140245955
    Abstract: An injection system for an apparatus for depositing thin layers by vacuum evaporation includes a container (4) for receiving a material to be evaporated, container heating elements adapted to evaporate the material, at least one injection ramp (1) including an inner conduit connected to the container so as to receive the evaporated material and a plurality of nozzles (3), each nozzle including at least a communication channel so as to diffuse the evaporated material into the vacuum evaporation chamber. The injection ramp (1) includes a plurality of injection modules (2a, 2b, 2c, 2d, 2e) mechanically connected to each other in series along a longitudinal direction (5), each injection module including a plurality of injection nozzles, and the injection ramp includes elements for adjusting the orientation of the injection modules about the longitudinal direction so as to align the injection nozzles along a line parallel to the longitudinal direction.
    Type: Application
    Filed: October 18, 2012
    Publication date: September 4, 2014
    Inventors: Jean-Louis Guyaux, Jerome Villette, Nicolas Briant, David Esteve
  • Patent number: 8673410
    Abstract: A method for manufacturing a poly- or microcrystalline silicon layer on an insulator comprises a silicon containing insulator, growing a thin adhesion promoting layer comprising amorphous silicon onto it and further growing a poly- or microcrystalline silicon layer onto the adhesion promoting layer. Such a sequence of layers, deposited with a PECVD method, shows good adhesion of the poly- or microcrystalline silicon on the base and is advantageous in the production of semiconductors, such as thin film transistors.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: March 18, 2014
    Assignee: Tel Solar AG
    Inventors: Hai Tran Quoc, Jerome Villette
  • Publication number: 20140007814
    Abstract: An evaporation device for a vacuum deposition apparatus includes a crucible to contain a material to be evaporated and a bottom, a body and an opening, and a heating element surrounding at least partially the crucible body, the evaporation device being placed inside a chamber with pressure <10?3 mbar. The device also includes at least one thermal shield between the crucible body and the heating element, the thermal shield including at least one element movable with respect to the crucible and designed so the heat received by the body of the crucible at a considered point of this body conforms, at a given instant of time, to a non-constant function of the distance between the considered point and the bottom of the crucible, this function being adjustable as regards at least one degree of movability of the first element of the thermal shield with respect to the crucible.
    Type: Application
    Filed: July 3, 2013
    Publication date: January 9, 2014
    Inventors: Jerome VILLETTE, Jean-Louis GUYAUX, David ESTEVE
  • Publication number: 20120097328
    Abstract: Described is equipment for depositing materials by evaporation using a molecular beam and equipment for fabricating semiconductor wafers, including a central conveyor module having a plurality of lateral ports capable of functioning under vacuum pressure conditions above 10?8 Torr. The semiconductor wafer fabrication equipment includes a loader module and one or more substrate treatment modules functioning under vacuum pressure conditions above 10?8 Torr, each treatment module being connected to one of the ports of the central conveyor module. The fabrication equipment includes at least one module for depositing materials by evaporation using a molecular beam operating under vacuum pressure conditions below 10?8 Torr, the molecular beam deposition module being connected to one of the ports of the central conveyor module and being capable of receiving the substrate in order to deposit a layer of materials on its face to be treated.
    Type: Application
    Filed: June 23, 2010
    Publication date: April 26, 2012
    Applicant: RIBER
    Inventors: Jerome Villette, Valerick Cassagne, Michel Picault
  • Publication number: 20120097102
    Abstract: Disclosed is an apparatus for depositing a thin film of material on a substrate and a regeneration process. The apparatus includes a chamber, a cryogenic panel disposed inside the chamber, a sample holder able to support a substrate, a gas injector able to inject a gaseous precursor into the chamber, a first trap connected to the vacuum chamber and able to trap a part of the gaseous precursor released by the cryogenic panel, the first trap having a fixed pumping capacity S1. The apparatus for depositing a thin film of material on a substrate includes a second trap having a variable pumping capacity S2 able to be regulated in function of the gaseous precursor partial pressure, the first and second trap providing a total pumping capacity S=S1+S2 sufficient to maintain the gaseous precursor partial pressure in the vacuum chamber under a determined pressure PL.
    Type: Application
    Filed: June 17, 2010
    Publication date: April 26, 2012
    Applicant: RIBER
    Inventors: Jerome Villette, Valerick Cassagne, Catherine Chaix
  • Publication number: 20120097105
    Abstract: A molecular beam epitaxy apparatus for producing wafers of semiconductor material includes a growth chamber surrounding a process area, a main cryogenic panel having a lateral part covering the inner surface of the lateral wall of the growth chamber, a sample holder, at least one effusion cell able to evaporate a material, a gas injector to inject a gaseous precursor into the growth chamber, a pumping element connected to the growth chamber to provide high vacuum capability. The apparatus includes an insulation enclosure covering at least the inner surfaces of the growth chamber walls, the insulation enclosure including cold parts having a temperature Tmin?melting point of the gaseous precursor, and hot parts having a temperature Tmin?a temperature wherein the desorption rate of the gaseous precursor on the hot parts is at least 1000 times greater than the adsorption rate of the gaseous precursor.
    Type: Application
    Filed: June 17, 2010
    Publication date: April 26, 2012
    Applicant: RIBER
    Inventors: Jerome Villette, Valerick Cassagne, Catherine Chaix
  • Patent number: 7897966
    Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).
    Type: Grant
    Filed: February 18, 2009
    Date of Patent: March 1, 2011
    Assignee: Oerlikon Solar AG, Trubbach
    Inventors: Hai Tran Quoc, Jerome Villette
  • Publication number: 20090155494
    Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).
    Type: Application
    Filed: February 18, 2009
    Publication date: June 18, 2009
    Applicant: Oerlikon Trading AG, Truebbach
    Inventors: Hai Tran Quoc, Jerome Villette
  • Patent number: 7514374
    Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: April 7, 2009
    Assignee: Oerlikon Trading AG, Trubbach
    Inventors: Hai Tran Quoc, Jérôme Villette
  • Publication number: 20070254165
    Abstract: A method for manufacturing a poly- or microcrystalline silicon layer on an insulator comprises a silicon containing insulator, growing a thin adhesion promoting layer comprising amorphous silicon onto it and further growing a poly- or microcrystalline silicon layer onto the adhesion promoting layer. Such a sequence of layers, deposited with a PECVD method, shows good adhesion of the poly- or microcrystalline silicon on the base and is advantageous in the production of semiconductors, such as thin film transistors.
    Type: Application
    Filed: July 28, 2005
    Publication date: November 1, 2007
    Applicant: OC OERLIKON BALZERS AG
    Inventors: Hai Tran Quoc, Jerome Villette
  • Publication number: 20070004220
    Abstract: For avoiding the metallic inner surface of a PECVD reactor to influence thickness uniformity and quality uniformity of a ?c-Si layer (19) deposited on a large-surface substrate, (15) before each substrate is single treated at least parts of the addressed wall are precoated with a dielectric layer (13).
    Type: Application
    Filed: June 28, 2006
    Publication date: January 4, 2007
    Applicant: OC OERLIKON BALZERS AG
    Inventors: Hai Tran Quoc, Jerome Villette
  • Patent number: D999384
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: September 19, 2023
    Assignee: DBV Technologies
    Inventors: Pascale Ehouarn, Jérôme Villette
  • Patent number: D999385
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: September 19, 2023
    Assignee: DBV Technologies
    Inventors: Pascale Ehouarn, Jérôme Villette
  • Patent number: D1012296
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: January 23, 2024
    Assignee: DBV Technologies
    Inventors: Pascale Ehouarn, Jérôme Villette
  • Patent number: D1012297
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: January 23, 2024
    Assignee: DBV Technologies
    Inventors: Pascale Ehouarn, Jérôme Villette