Patents by Inventor Jerome W. Parson

Jerome W. Parson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7793029
    Abstract: An apparatus and method for selectively configuring a first PCI Express connector and a second PCI Express connector. The apparatus includes a PCB (printed circuit board) having a PCI Express first connector and a PCI Express second connector mounted thereon. A translation device connector and a bridge component are also mounted on the PCB. The bridge component is coupled to the first connector, the second connector, and the translation device connector. The translation device connector is adapted to couple to a translation device in either a first orientation or a second orientation, wherein the first orientation configures the first connector for a first number of lanes and the second orientation configures the first connector and the second connector for a second number of lanes.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: September 7, 2010
    Assignee: NVIDIA Corporation
    Inventors: Jerome W. Parson, Christopher A. Klein
  • Patent number: 6473309
    Abstract: A method and apparatus for mounting a motherboard to a computer chassis wherein the motherboard includes a first integrated fastener member and the chassis includes a second integrated fastener member. The motherboard is mounted to the chassis by mating the first fastener member to the second fastener member.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: October 29, 2002
    Assignee: Intel Corporation
    Inventor: Jerome W. Parson
  • Patent number: 6215727
    Abstract: A method and apparatus providing parallel memory circuitry, such as for example synchronous dynamic random access memory (SDRAM) support in a computer system designed to support serial memory circuitry, such as for example Rambus dynamic random access memory (RDRAM). In one embodiment, a circuit board including a memory translator having serial memory interface logic and parallel memory interface logic is plugged into a serial memory connector on a motherboard designed to utilize serial memory circuitry. The circuit board includes parallel memory circuitry coupled to the parallel memory interface logic of the memory translator. The memory controller on the motherboard accesses the parallel memory circuitry on the circuit board through the memory translator.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: April 10, 2001
    Assignee: Intel Corporation
    Inventors: Jerome W. Parson, William M. Vaughn