Abstract: An I/O controller functions to provide management of, control of, while functioning as two "virtual" data link processors for at least two separate types of peripheral terminal units, thus enabling data transfers between a host computer and any selected one of the peripheral terminal units. A commonly shared logic interface, common to both virtual controllers, is selected for use by a Request-Program Array Logic unit which arbitrates the utilization of the common logic by one of two virtual controllers at any given time. A first and second status latch is provided in the common front end interface of the I/O controller whereby each status latch provides status signals to the main host computer system of the state of any one of two virtual controllers which share common interface to a host computer.

Abstract: A peripheral controller (data link processor) controls data transfers between a host computer and a plurality of tape peripheral units and a single printer peripheral unit. A master microprocessor commands three subordinate controllers to permit concurrent data transfers through a buffer memory in both the Read and the Write directions. A dual channel control from the master microprocessor actuates a DMA switch so that data transfers to/from the tape units can be controlled by switching on alternate control lines which regulate the data transfer operations.

Abstract: A processor forms part of a computer network wherein the processor, designated as the User Interface Processor, operates to initialize and maintain and communicate to remote diagnostic terminals for purposes of confirming integrity of the system and also for finding the location of any faults or problems in the system. The User Interface Processor involves a microprocessor unit working in conjunction with a serial communications controller, random access memory and read only memory memories, a communications input/output (I/O) system, a multiple set of timer units and a priority interrupt controller. The User Interface Processor provides interfaces to a power control card unit, an I/O subsystem (of data link processors), and a remote terminal for diagnostic intercommunication.

Abstract: A maintenance processor forms part of a computer network wherein the processor (also designated as the User Interface Processor) operates to initialize and maintain and communicate to remote diagnostic terminals for purposes of confirming integrity of the system and also for displaying data for locating any faults or problems in the network. The maintenance subsystem initiates start-up and self-test routines in a sequenced order for establishing the integrity of the units in the network. The subsystem includes means for testing two types of subsystems, that is, one having I/O controllers with self-test capability and another subsystem having I/O controllers without self-test capability. The UIP provides means for complete control of the network. It can interface the network to a remote service center where all operations such as power-up and initialization can be also effectuated.