Abstract: Systems, devices, and methods are described for providing, among other things, an electrodynamic contactless braking system. In an embodiment, the electrodynamic contactless braking system may include plurality of electromagnet assemblies arranged and configured to have alternating magnetic field orientations. In an embodiment, each electromagnet assembly may include an air gap formed between a first electromagnet pole and a second electromagnet pole. In an embodiment, each electromagnet assembly is configured to generate a magnetic field of a character and for a duration sufficient to induce eddy currents on an electrically-conductive element moving within the air gap of each of the plurality of electromagnets. In an embodiment, the electrodynamic contactless braking system may include a controller operatively coupled to each of the plurality of electromagnets, the controller configured operate the plurality of electromagnets in parallel.

Abstract: Systems, devices, and methods are described for providing, among other things, a neck and spine strengthening device. The strengthening device includes a spinal resistance assembly configured to apply a resist force or to resist rotation about at least a first axis, and a head affixing assembly configured to secure to a head of a user during use. The strengthening device is instrumented with sensors and an embedded computing system configured to securely exchange exercise performance and configuration data with local client devices, and to monitor and record exercise activity and exercise performance data.

Abstract: Systems, devices, and methods are described for providing, among other things, a neck and spine strengthening device. In an embodiment, the neck strengthening device includes a spinal resistance assembly including at least one resistance component configured to apply a resist force or to resist rotation about a first axis. In an embodiment, the spinal resistance assembly permits lateral neck rotation of a user about the first axis while substantially limiting flexional and extensional movement. In an embodiment, the neck strengthening device includes a device securing assembly configured to physically anchor the device to an anchoring structure. In an embodiment, the neck strengthening device includes a head affixing assembly configured to secure to a head of a user during use.

Abstract: Technologies relating to efficient memory management for parallel synchronous computing systems are disclosed. Parallel synchronous computing systems may include, for example, a host, a memory management subsystem, and an array of processing units adapted to execute in parallel. Memory management may be implemented at least in part via the memory management subsystem. A memory management subsystem may include one or more memory subsystem layers deployed between the host and the array of processing units. Each memory subsystem layer may have a local memory accessible by entities (whether the host or another layer) above the memory subsystem layer; and a memory controller adapted to manage communications between the entities (whether another layer or the processing units in the array) below the memory subsystem layer.

Abstract: Technologies relating to efficient memory management for parallel synchronous computing systems are disclosed. Parallel synchronous computing systems may include, for example, a host, a memory management subsystem, and an array of processing units adapted to execute in parallel. Memory management may be implemented at least in part via the memory management subsystem. A memory management subsystem may include one or more memory subsystem layers deployed between the host and the array of processing units. Each memory subsystem layer may have a local memory accessible by entities (whether the host or another layer) above the memory subsystem layer; and a memory controller adapted to manage communications between the entities (whether another layer or the processing units in the array) below the memory subsystem layer.

Abstract: Technologies relating to real time logic simulation within a mixed mode simulation network are described. Mixed mode simulation networks may comprise Boolean Processing Units (BPUs) and Real Time Processing Units (RTPUs). Mixed mode simulation networks may send an input simulation state vector to the processing units, and the processing units may process portions thereof to calculate portions of an output simulation state vector. BPUs may be adapted to calculate portions of the output simulation state vector without accounting for delay times attributable to operation of a simulated system, while RTPUs may be adapted to calculate portions of the output simulation state vector with accounting for delay times attributable to operation of the simulated system. The calculated portions of the output simulation state vector may be combined in a computational memory, and the resulting output simulation state vector may be used as an input simulation state vector in a next simulation calculation cycle.