Abstract: Nonwoven fabrics having desirable wiping properties while also providing pleasant tactile properties are provided. The nonwoven fabrics may include a first nonwoven outer layer, a second nonwoven outer layer, and a core layer located between the first nonwoven layer and the second nonwoven outer layer. At least one of the first nonwoven outer layer and the second nonwoven outer layer may include a plurality of blended filaments comprising a blend of a polymer and an elastomeric polyolefin.

Abstract: Logical processor distribution across physical processors is provided. A set of logical processors of a number of logical processors defined for a particular logical partition of a plurality of active logical partitions is assigned to a physical processor chip having a greatest logical processor entitlement for the particular logical partition until no more logical processors can be assigned to that physical processor chip based on a logical processor entitlement of that physical processor chip being exhausted. Remaining logical processors of the number of logical processors defined for the particular logical partition are assigned to other physical processor chips of a plurality of physical processor chips assigned to the particular logical partition until all of the remaining logical processors have been assigned to a physical processor chip.

Abstract: Logical processor distribution across physical processors is provided. A set of logical processors of a number of logical processors defined for a particular logical partition of a plurality of active logical partitions is assigned to a physical processor chip having a greatest logical processor entitlement for the particular logical partition until no more logical processors can be assigned to that physical processor chip based on a logical processor entitlement of that physical processor chip being exhausted. Remaining logical processors of the number of logical processors defined for the particular logical partition are assigned to other physical processor chips of a plurality of physical processor chips assigned to the particular logical partition until all of the remaining logical processors have been assigned to a physical processor chip.

Abstract: In an approach for managing physical processor usage of a shared memory buffer, a processor receives a request for memory. A processor receives a request for memory from a process running on a physical processor. A processor determines whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests of each memory size. Responsive to determining the request for memory is greater than the pre-determined threshold, a processor identifies a node on which the physical processor resides. A processor identifies a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides. A processor allocates the memory buffer.

Abstract: In an approach for isolating physical processors during optimization of virtual machine placement, a server is provided comprising a plurality of containers and a plurality of physical processors. A processor builds a set of bit masks for each type of physical processor required for a logical partition. A processor builds a set of solution spaces based on the plurality of containers and an amount of each type of container of the plurality of containers. A processor completes a combinatorial search of the set of bitmasks and the set of solution spaces. A processor identifies a solution space of the set of solution spaces for the logical partition. The physical and logical configuration of the server is changed based on the solution space for the first logical partition.

Abstract: In an approach for managing physical processor usage of a shared memory buffer, a processor receives a request for memory. A processor receives a request for memory from a process running on a physical processor. A processor determines whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests of each memory size. Responsive to determining the request for memory is greater than the pre-determined threshold, a processor identifies a node on which the physical processor resides. A processor identifies a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides. A processor allocates the memory buffer.

Abstract: In an approach for isolating physical processors during optimization of virtual machine placement, a server is provided comprising a plurality of containers and a plurality of physical processors. A processor builds a set of bit masks for each type of physical processor required for a logical partition. A processor builds a set of solution spaces based on the plurality of containers and an amount of each type of container of the plurality of containers. A processor completes a combinatorial search of the set of bitmasks and the set of solution spaces. A processor identifies a solution space of the set of solution spaces for the logical partition. The physical and logical configuration of the server is changed based on the solution space for the first logical partition.

Abstract: Described herein are technical features for freeing a buffer used during execution of a work-item by a multiprocessor. An example method includes identifying a first processing unit that assigned the buffer to the work-item, in response to a request from a second processing unit to free the buffer. The computer-implemented method also includes identifying a bitmap associated with the buffer, the bitmap being in a local memory of the first processing unit. The computer-implemented method also includes updating a bit from the bitmap to indicate that the buffer has been freed, the bit corresponding to the buffer.

Abstract: Described herein are technical features for freeing a buffer used during execution of a work-item by a multiprocessor. An example method includes identifying a first processing unit that assigned the buffer to the work-item, in response to a request from a second processing unit to free the buffer. The computer-implemented method also includes identifying a bitmap associated with the buffer, the bitmap being in a local memory of the first processing unit. The computer-implemented method also includes updating a bit from the bitmap to indicate that the buffer has been freed, the bit corresponding to the buffer.

Abstract: Described herein are technical features for freeing a buffer used during execution of a work-item by a multiprocessor. An example method includes identifying a first processing unit that assigned the buffer to the work-item, in response to a request from a second processing unit to free the buffer. The computer-implemented method also includes identifying a bitmap associated with the buffer, the bitmap being in a local memory of the first processing unit. The computer-implemented method also includes updating a bit from the bitmap to indicate that the buffer has been freed, the bit corresponding to the buffer.

Abstract: Aspects of the present invention include a method, system and computer program product that implements a memory management scheme for each processor in a multiprocessor system. The method includes pre-allocating, for each processor in a multiprocessor system, a set of memory buffers; and implementing a metadata bitmap for each pre-allocated set of memory buffers, wherein the metadata bitmap for each pre-allocated set of memory buffers comprises a plurality of bits, and wherein each of the plurality of bits is indicative of a usage state of a corresponding one of the memory buffers within each pre-allocated set of memory buffers.

Abstract: Aspects of the present invention include a method, system and computer program product that implements a memory management scheme for each processor in a multiprocessor system. The method includes pre-allocating, for each processor in a multiprocessor system, a set of memory buffers; and implementing a metadata bitmap for each pre-allocated set of memory buffers, wherein the metadata bitmap for each pre-allocated set of memory buffers comprises a plurality of bits, and wherein each of the plurality of bits is indicative of a usage state of a corresponding one of the memory buffers within each pre-allocated set of memory buffers.

Abstract: Examples of techniques for pre-allocating save areas of memory of a computer processing system are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include initiating, by a host processing device, a control program. The method may further include, responsive to initiating the control program, pre-allocating, by the host processing device, a plurality of save areas for each of a plurality of processors, wherein the plurality of save areas are anchored in a fixed area of the memory for each of the plurality of processors.

Abstract: Examples of techniques for pre-allocating save areas of memory of a computer processing system are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include initiating, by a host processing device, a control program. The method may further include, responsive to initiating the control program, pre-allocating, by the host processing device, a plurality of save areas for each of a plurality of processors, wherein the plurality of save areas are anchored in a fixed area of the memory for each of the plurality of processors.

Abstract: Described herein are technical features for freeing a buffer used during execution of a work-item by a multiprocessor. An example method includes identifying a first processing unit that assigned the buffer to the work-item, in response to a request from a second processing unit to free the buffer. The computer-implemented method also includes identifying a bitmap associated with the buffer, the bitmap being in a local memory of the first processing unit. The computer-implemented method also includes updating a bit from the bitmap to indicate that the buffer has been freed, the bit corresponding to the buffer.

Abstract: Aspects of the present invention include a method, system and computer program product that implements a memory management scheme for each processor in a multiprocessor system. The method includes pre-allocating, for each processor in a multiprocessor system, a set of memory buffers; and implementing a metadata bitmap for each pre-allocated set of memory buffers, wherein the metadata bitmap for each pre-allocated set of memory buffers comprises a plurality of bits, and wherein each of the plurality of bits is indicative of a usage state of a corresponding one of the memory buffers within each pre-allocated set of memory buffers.

Abstract: Aspects of the present invention include a method, system and computer program product that implements a memory management scheme for each processor in a multiprocessor system. The method includes pre-allocating, for each processor in a multiprocessor system, a set of memory buffers; and implementing a metadata bitmap for each pre-allocated set of memory buffers, wherein the metadata bitmap for each pre-allocated set of memory buffers comprises a plurality of bits, and wherein each of the plurality of bits is indicative of a usage state of a corresponding one of the memory buffers within each pre-allocated set of memory buffers.

Abstract: Examples of techniques for pre-allocating save areas of memory of a computer processing system are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include initiating, by a host processing device, a control program. The method may further include, responsive to initiating the control program, pre-allocating, by the host processing device, a plurality of save areas for each of a plurality of processors, wherein the plurality of save areas are anchored in a fixed area of the memory for each of the plurality of processors.

Abstract: Examples of techniques for pre-allocating save areas of memory of a computer processing system are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include initiating, by a host processing device, a control program. The method may further include, responsive to initiating the control program, pre-allocating, by the host processing device, a plurality of save areas for each of a plurality of processors, wherein the plurality of save areas are anchored in a fixed area of the memory for each of the plurality of processors.

Abstract: Examples of techniques for pre-allocating save areas of memory of a computer processing system are disclosed. In one example implementation according to aspects of the present disclosure, a computer-implemented method may include initiating, by a host processing device, a control program. The method may further include, responsive to initiating the control program, pre-allocating, by the host processing device, a plurality of save areas for each of a plurality of processors, wherein the plurality of save areas are anchored in a fixed area of the memory for each of the plurality of processors.