Patents by Inventor Jerry ALSTON

Jerry ALSTON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230214326
    Abstract: A memory expansion device operable with a host computer system (host) comprises a non-volatile memory (NVM) subsystem, cache memory, and control logic configurable to receive a submission from the host including a read command and specifying a payload in the NVM subsystem and demand data in the payload. The control logic is configured to request ownership of a set of cache lines corresponding to the payload, to indicate completion of the submission after acquiring ownership of the cache lines, and to load the payload to the cache memory. The set of cache lines correspond to a set of cache lines in a coherent destination memory space accessible by the host. The control logic is further configured to, after indicating completion of the submission and in response to a request from the host to read demand data in the payload, return the demand data after determining that the demand data is in the cache memory.
    Type: Application
    Filed: June 1, 2021
    Publication date: July 6, 2023
    Inventors: Jordan HORWICH, Jerry ALSTON, Chih-Cheh CHEN, Patrick LEE, Scott MILTON, Jeekyoung PARK
  • Patent number: 11500797
    Abstract: A memory expansion device operable with a host computer system (host) comprises a non-volatile memory (NVM) subsystem, cache memory, and control logic configurable to receive a submission from the host including a read command and specifying a payload in the NVM subsystem and demand data in the payload. The control logic is configured to request ownership of a set of cache lines corresponding to the payload, to indicate completion of the submission after acquiring ownership of the cache lines, and to load the payload to the cache memory. The set of cache lines correspond to a set of cache lines in a coherent destination memory space accessible by the host. The control logic is further configured to, after indicating completion of the submission and in response to a request from the host to read demand data in the payload, return the demand data after determining that the demand data is in the cache memory.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: November 15, 2022
    Assignee: Netlist, Inc.
    Inventors: Jordan Horwich, Jerry Alston, Chih-Cheh Chen, Patrick Lee, Scott Milton, Jeekyoung Park
  • Publication number: 20210374080
    Abstract: A memory expansion device operable with a host computer system (host) comprises a non-volatile memory (NVM) subsystem, cache memory, and control logic configurable to receive a submission from the host including a read command and specifying a payload in the NVM subsystem and demand data in the payload. The control logic is configured to request ownership of a set of cache lines corresponding to the payload, to indicate completion of the submission after acquiring ownership of the cache lines, and to load the payload to the cache memory. The set of cache lines correspond to a set of cache lines in a coherent destination memory space accessible by the host. The control logic is further configured to, after indicating completion of the submission and in response to a request from the host to read demand data in the payload, return the demand data after determining that the demand data is in the cache memory.
    Type: Application
    Filed: June 1, 2021
    Publication date: December 2, 2021
    Inventors: Jordan HORWICH, Jerry ALSTON, Chih-Cheh CHEN, Patrick LEE, Scott MILTON, Jeekyoung PARK