Patents by Inventor Jerry B. Medders

Jerry B. Medders has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5595522
    Abstract: An edge polishing system (20, 320) and method for edge polishing semiconductor wafers is disclosed. The system (20, 320) includes a loader (22, 326), a polisher (24, 328), an unloader (26, 330), and a controller (28, 335). The method includes the steps of loading wafers (28), and spacers (30) into a loader (22) to form a stack (36), moving the stack (36) into a polisher (24) and causing polisher (24) to polish the stack (36), then moving the stack (36) to an unloader (26), which semiautomatically removes the wafers (28) and spacers (30). The system (20) may include a controller (28) for entering the appropriate commands.
    Type: Grant
    Filed: January 4, 1994
    Date of Patent: January 21, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Vikki S. Simpson, Tom G. Gullett, Jerry B. Medders, Arthur R. Clark, Bobby R. Robbins, Danny R. Newton, Lawrence D. Dyer, Douglas W. Bilderback, Clyde A. King
  • Patent number: 5424224
    Abstract: The protection to the backside of the semiconductor wafer is accomplished by applying a layer of silicon oxide or silicon nitride or other deposited material to the back surface of a semiconductor wafer to protect against particles, scratches, and etching by mild caustic solutions. The layer remains in place during all three processes, edge pre-polish, mirror edge polish, and wafer polish.
    Type: Grant
    Filed: January 19, 1993
    Date of Patent: June 13, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Franklin L. Allen, Eugene C. Davis, Lawrence D. Dyer, Jerry B. Medders, Vikki S. Simpson, Jerry D. Smith, Michael Cunningham, John B. Robbins
  • Patent number: 5274959
    Abstract: A system and method for polishing the edges of a plurality of semiconductor wafers rotates a stack of wafers against a polish one or more pads such that both the wafer edges and the sides of the edges are polished to a mirror finish. The polish pad has a series of grooves through which the wafer edges are passed to polish the sides of the wafer edges, or two pads are used, one with grooves and one without grooves.
    Type: Grant
    Filed: December 11, 1992
    Date of Patent: January 4, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Lawrence D. Dyer, Anthony E. Stephens, Frank Allen, Keith M. Easton, James A. Kennon, Jerry B. Medders, Frederick O. Meyer, III
  • Patent number: 5240557
    Abstract: An apparatus stacks semiconductor wafers and spacers and clamps them in an axial alignment for mounting in a semiconductor wafer edge polishing machine. After edge polishing, the apparatus separates the wafers and spacers and delivers them respectively into separate cassettes for further processing or recycling.
    Type: Grant
    Filed: June 1, 1992
    Date of Patent: August 31, 1993
    Assignee: Texas Instruments Incorporated
    Inventors: Lawrence D. Dyer, Dempsey McGregor, Robert M. Montgomery, Jerry B. Medders, Michael R. Head, Tom G. Gullett
  • Patent number: 5128281
    Abstract: A method for polishing the edges of a plurality of semiconductor wafers rotates a stack of wafers against a polish one or more pads such that both the wafer edges and the sides of the edges are polished to a mirror finish. The polish pad has a series of grooves through which the wafer edges are passed to polish the sides of the wafer edges, or two pads are used, one with grooves and one without grooves.
    Type: Grant
    Filed: June 5, 1991
    Date of Patent: July 7, 1992
    Assignee: Texas Instruments Incorporated
    Inventors: Lawrence D. Dyer, Anthony E. Stephens, Frank Allen, Keith M. Easton, James A. Kennon, Jerry B. Medders, Frederick O. Meyer, III
  • Patent number: 4915607
    Abstract: A lead frame assembly is disclosed which interfaces with existing wire bonders using a single track design from the bonder through the molding process. During the molding operation, the bonded lead frame is transferred into the mold on a guide track system built into the mold chase. The mold closes and clamps the lead frame after which a compound charging system meters and injects a compound into the mold cavities. The mold is opened and the strip ejected and transferred out of the mold via internal guide tracks. A granular or pellet form of compound is used in the charging system. The lead frame assembly has side rails, between which a temporary and a permanent support structure is formed. The temporary support structure is removed from the bonded integrated circuits after the bonding process is completed, while the permanent structure is made a part of the bonded integrated circuit package.
    Type: Grant
    Filed: October 6, 1988
    Date of Patent: April 10, 1990
    Assignee: Texas Instruments Incorporated
    Inventors: Jerry B. Medders, Susan S. Fitzgerald, Donald R. Kelley, Jeffrey L. Popken
  • Patent number: 4812114
    Abstract: A molding system and process is disclosed to interface with existing wire bonders using a single track design from the bonder through the molding process. During the molding operation, the bonded lead frame is transferred into the mold on a guide track system built into the mold chase. The mold closes and clamps the lead frame after which a compound charging system meters and injects a compound into the mold cavities. The mold is opened and the strip ejected and transferred out of the mold via internal guide tracks. A granular or pellet form of compound is use in the charging system.
    Type: Grant
    Filed: September 30, 1987
    Date of Patent: March 14, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: James A. Kennon, Shafidul Islam, Jeffrey L. Popken, Jerry B. Medders, Susan S. Fitzgerald, Donald R. Kelley, Philip A. Burr