Patents by Inventor Jerry Doorenbos

Jerry Doorenbos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190204375
    Abstract: A system comprises a noise generator circuit and a noise envelope detector circuit. The noise generator circuit comprises a first amplifier including a single transistor pair that is operable to generate 1/f noise, an output amplifier coupled to the first amplifier and configured to generate a 1/f noise signal as a function of the 1/f noise. The noise envelope detector circuit comprises a low pass filter operable to pass low frequency signals of the 1/f noise signal as a filtered 1/f noise signal, and a second amplifier or a comparator coupled to the low pass filter and operable to output a direct current (DC) voltage signal according to an envelope of the filtered 1/f noise signal, where the DC voltage signal is a function of an envelope of the filtered 1/f noise signal.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 4, 2019
    Inventors: Yuguo WANG, Steven LOVELESS, Tathagata CHATTERJEE, Jerry DOORENBOS
  • Publication number: 20070143653
    Abstract: The synchronous logic device with reduced pin count scan chain includes: more than two flip/flops coupled to form a shift register for receiving a scan data input signal; a combinational logic circuit for receiving device inputs, generating flip/flop inputs for the more than two flip/flops, and generating an output signal; a first multiplexer for providing a clock signal to the more than two flip/flops during a test mode; a second multiplexer for selecting between a test mode output from the shift register and the output signal from the combinational logic circuit, and for providing a scan data output signal; and wherein the scan data input signal and the scan data output signal share an input/output pin.
    Type: Application
    Filed: December 19, 2005
    Publication date: June 21, 2007
    Inventors: Jerry Doorenbos, Dimitar Trifonov, Marco Gardner
  • Publication number: 20060202929
    Abstract: A gamma reference voltage generator (10B) for an LCD display includes a control interface logic circuit (48) having an output bus coupled to inputs of a first register (46) having outputs coupled to inputs of a second register (42) the outputs of which are coupled to corresponding inputs of plurality of DACs (28). The control interface logic circuit receives gray scale codes representative of gamma reference voltages and transfers the codes via the output bus into the first register and controls further transfer of the codes to inputs of the DACs to instantaneously or rapidly update gamma correction voltages applied to the LCD display.
    Type: Application
    Filed: March 14, 2005
    Publication date: September 14, 2006
    Inventors: David Baum, Frank Haupt, Jerry Doorenbos
  • Patent number: 6970122
    Abstract: A segmented string digital-to-analog converter (DAC) comprises least significant bits (LSB subword) interpolation circuitry. The LSB subword interpolation circuitry defines, for each input digital word (or code), an offset voltage representative of an M bit LSB subword of the input digital word. The offset voltage modifies a coarse analog representation voltage of an N bit most significant bits (MSB subword) of the input digital word. The LSB subword interpolation circuitry includes a coarse analog representative voltage input, an LSB subword input, an LSB modification circuit, an offset voltage defining circuit, and a summation device. The DAC further includes a segmented string and a coarse level device connected to tap points of the segmented string. The offset voltage defining circuit receives an LSB subword and defines an offset voltage for modifying the corresponding coarse analog representative voltage. Such an offset voltage is defined based on a given modified LSB subword.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Abdullah Yilmaz, Jerry Doorenbos