Abstract: An apparatus includes a bi-directional DC motor; a gear reducer connected to the DC motor; a pulley mounted on an output of the gear reducer; an anti-back drive brake mounted on the output of the gear reducer; a reel wound with cable; a second pulley attached to the reel wound with cable; a belt for connecting the pulley and the second pulley; a water measuring device attached to an end of the cable wound on the reel; at least one shaft encoder attached to the motor for measuring the speed and direction of the motor; a DC power source connected to the DC motor; a microprocessor control electronics module connected to the at least one shaft encoder and the DC motor; and a remote control in communication with the microprocessor control electronics module.

Abstract: A digital preemphasizer that provides a means for high fidelity reconstruction, i.e. low, acceptable bit error-rate, of an original pulse code modulation (PCM) serial stream binary data signal which has suffered degradation of fidelity, and consequent increase in bit-error-rate, during transmission on a single channel from a transmitter to a receiver, connected to each other by a transmission line exhibiting both resistive and frequency dependent loss. This is accomplished prior to transmission by amplitude encoded digital pre-emphasis of each bit of the original binary data signal to be transmitted in such manner as to mitigate or remedy the signal degrading frequency dependent losses concomitant with the signal transfer network characteristics of the fixed transmission line. Subsequent to this pre-emphasis process, the amplitude encoded signal is transmitted to the receiver connected to the other end of the fixed transmission line.

Abstract: A split-BUS multiprocessor system for acquiring data and outputting the d in digital computer format has an electronic front end that receives data from one or more sensors and converts the data to digital form. An acquisition microprocessor operating in a polling mode acquires the digital data and stores it in a data memory. An output microprocessor operating in an interrupt mode extracts the data from the data memory and routes it to appropriate display and recording devices in digital computer format.

Abstract: A method for digital preemphasizer high fidelity reconstruction of an original pulse code modulation (PCM) serial stream binary data signal which has suffered degradation of fidelity, and consequent increase in bit-error-rate, during transmission on a single channel from a transmitter to a receiver. Prior to transmission, amplitude encoded digital pre-emphasis of each bit of the original binary data signal to be transmitted mitigates or remedies the signal degrading frequency dependent losses concomitant with the signal transfer network characteristics of the fixed transmission line. Subsequently, the amplitude encoded signal is transmitted to the receiver connected to the other end of the fixed transmission line. Compared to a conventional transmitter, transmision line, and receiver system, the end result of amplitude encoded pre-emphasis is superior reconstructed fidelity and quality of the PCM waveform, i.e. lower bit-error-rate, at the output of the receiver for the same length of transmission line.