Abstract: A data storage device processes a mixed workload including a plurality of superblocks to be written to and read from a plurality of memory dies, where each of the plurality of superblocks to be apportioned among the plurality of memory dies. The data storage device writes a first data stripe associated with a first superblock to the plurality of memory dies according to a sequential write pattern, and reads the first data stripe associated with the first superblock from the plurality of memory dies according to a sequential read pattern. The sequential write pattern causes the controller to write to the plurality of memory dies in a first order of memory dies. The sequential read pattern causes the controller to read from the plurality of memory dies in a second order of memory dies different from the first order of memory dies, thereby reducing read collisions.

Abstract: A device receives a first data item. The device stores the first data item in non-volatile memory. The device subsequently receives a second data item, where the second data item was previously generated from the first data item and a cryptographic key. The device performs a function such as, for example, an exclusive-or operation on the first data item and the second data item to generate the cryptographic key. The device uses the generated cryptographic key to encrypt data which may be transmitted over a wireless interface.

Abstract: A device receives a first data item. The device stores the first data item in non-volatile memory. The device subsequently receives a second data item, where the second data item was previously generated from the first data item and a cryptographic key. The device performs a function such as, for example, an exclusive-or operation on the first data item and the second data item to generate the cryptographic key. The device uses the generated cryptographic key to encrypt data which may be transmitted over a wireless interface.

Abstract: Methods and systems are disclosed for testing and/or validating that an untrusted device is operating according to an expected state or configuration. The methods and systems may be designed such that the volatile memory of the untrusted device is brought to a known state for validation, for example upon ingress to or egress from a protected mode of operation. The device may execute a first operating system when operating outside of the protected mode. Upon determining to transition to protected mode, an operational image of a second operating system may be loaded into the device. The device may write a pattern to unused memory for validation. The device may receive a first challenge request from a trusted monitor (TM). In order to be successfully validated, the device may answer the challenge correctly within a given response window based on the current state of its volatile memory.

Abstract: Methods and systems are disclosed for testing and/or validating that an untrusted device is operating according to an expected state or configuration. The methods and systems may be designed such that the volatile memory of the untrusted device is brought to a known state for validation, for example upon ingress to or egress from a protected mode of operation. The device may execute a first operating system when operating outside of the protected mode. Upon determining to transition to protected mode, an operational image of a second operating system may be loaded into the device. The device may write a pattern to unused memory for validation. The device may receive a first challenge request from a trusted monitor (TM). In order to be successfully validated, the device may answer the challenge correctly within a given response window based on the current state of its volatile memory.

Abstract: Methods and systems are disclosed for testing and/or validating that an untrusted device is operating according to an expected state or configuration. The methods and systems may be designed such that the volatile memory of the untrusted device is brought to a known state for validation, for example upon ingress to or egress from a protected mode of operation. The device may execute a first operating system when operating outside of the protected mode. Upon determining to transition to protected mode, an operational image of a second operating system may be loaded into the device. The device may write a pattern to unused memory for validation. The device may receive a first challenge request from a trusted monitor (TM). In order to be successfully validated, the device may answer the challenge correctly within a given response window based on the current state of its volatile memory.

Abstract: Methods and systems for increasing the security or trust associated with an untrusted device are provided. For example, a trusted hardware component may send a request to the untrusted device. The request may indicate one or more challenges to be performed by a secure application executing on the untrusted device. The trusted hardware component may determine an expected response to the one or more challenges. The expected response may be determined at the secure hardware component based on an expected configuration of the untrusted device. The trusted hardware component may receive a response to the request from the untrusted device. The trusted hardware component may determine a security status of the untrusted device based on the expected response and the received response.

Abstract: Methods and systems are described to allow for the parallel processing of packets and other subsets of data that are to be delivered in order after the completion of the parallel processing. The methods and systems may process packets and subsets of data that may vary in size by orders of magnitude. The packets may be transmitted and/or received over data transmission networks that may be orders of magnitude faster than the processing speeds of the parallel processors. Entire packets or subsets of data may be allocated to individual processing units without segmenting the packets between the processing units. A count value may be inserted as metadata to received packets in order to indicate a relative order of arrival. The metadata may be utilized by a multiplexor at the output of the parallel processing units in order to maintain in-sequence delivery of the processed packets.

Abstract: Methods and systems are described to allow for the parallel processing of packets and other subsets of data that are to be delivered in order after the completion of the parallel processing. The methods and systems may process packets and subsets of data that may vary in size by orders of magnitude. The packets may be transmitted and/or received over data transmission networks that may be orders of magnitude faster than the processing speeds of the parallel processors. Entire packets or subsets of data may be allocated to individual processing units without segmenting the packets between the processing units. A count value may be inserted as metadata to received packets in order to indicate a relative order of arrival. The metadata may be utilized by a multiplexor at the output of the parallel processing units in order to maintain in-sequence delivery of the processed packets.

Abstract: A method and apparatus for substantially reducing electromagnetic radiation from a backplane used to interconnect multiple communication modules. Data signals to be transmitted onto the backplane are first scrambled using a pseudorandom code sequence, to reduce energy peaks in the radiation spectrum and to spread energy over a wider bandwidth. Signals received from the backplane are descrambled using an identical pseudorandom code sequence. Data rate synchronization is provided by recovery of a data clock signal from the received scrambled signals, and data frame synchronization is provided by transmitting data frame headers as non-scrambled data. At a receiver module, the frame headers are detected and used to reset the descrambling operation.

Abstract: A technique for synchronizing run-length-limited data transmitted over two parallel narrowband communication channels, such as in a token ring local area network using fiber distributed data interface (FDDI) protocols. A serial data stream to be transmitted is demultiplexed onto the two channels by sending sequential blocks of equal numbers of bits over alternate channels. In a receiver-multiplexer, block boundary synchronization is established during connection initialization by using a property of a required HALT code to detect block boundaries received in each channel. Skew compensation is effected by comparing the times of detection of the block boundaries in the two channels, and appropriately controlling a variable delay in at least one of the channels.

Abstract: An apparatus to detect stations having duplicated addresses, the stations of the type connected in a computer communications network, the stations of the type capable of having an assigned address and having a list of addresses for comparison with a destination address field of a frame detected on the network is disclosed. The apparatus does a transmit self test, and sets a self indicator to "pass" in the event that the self test frame is received, and sets the self indicator to "timeout" in the event that a timeout occurs. The apparatus does a neighbor response test, and sets a neighbor indicator to "timeout" in the event that a timeout occurs, and sets the neighbor indicator to "pass" in the event that a received response frame indicates no destination address match, and sets the neighbor indicator to "fail" in the event that a received response frame indicates that a destination address match did occur.

Abstract: A method and apparatus for detecting invalid network topologies in a local area network (LAN). The stations comprising the LAN include single attachment stations (SAS), dual attachment stations (DAS), wire concentrators (WC), and DAS/WC combination stations. Adjacent stations exchange connection type information identifying a type of physical connection of the station sending the connection information. A station receiving the connection information determines whether the connection is valid for its physical connection type using a connection matrix. Invalid connections can result in a network topology where stations are physically connected, but are not logically connected, because the stations do not all form a primary ring. Invalid connections may be rejected and bypassed in each station. Alternately, a station detecting an invalid connection may reconfigure itself using an internal data switch. The actions of each station, taken together, achieve a globally designated primary ring.

Abstract: A method and apparatus for controlling the topology of a local area network (LAN) configured as a ring of trees. The stations comprising the LAN are limited to single access stations (SAS), dual access stations (DAS), wire concentrators (WC), and DAS/WC combination stations. The topology control requires the exchange of connection type information only between immediately adjacent stations. The resulting simplicity in the information exchange requirments allows validation and rejection of invalid connections or reconfiguration of the network topology to be implemented as low as the Physical layer of the ISO model.