Patents by Inventor Jerry Kyle Radcliffe

Jerry Kyle Radcliffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System for deriving desired output frequency by successively dividing clock signal frequency by ratios obtained by dividing clock signal frequency by common divisor and specific integer
    Patent number: 7032121
    Abstract: A signal is generated by providing a clock signal having a frequency (fosc). The clock frequency fosc is arithmetically divided by an output frequency (fo) associated with the signal to obtain a ratio R and a remainder given by x/y. The signal is derived from the clock signal by successively dividing the frequency (fosc) of the clock signal by one of R and R+1, such that a fraction of times that the frequency (fosc) of the clock signal is divided by R is given by 1-x/y and a fraction of times that the frequency (fosc) of the clock signal is divided by R+1 is given by x/y. In particular, the signal is derived by driving a counter using the clock signal to a count value of one of R and R+1, such that a fraction of times that the counter is driven to a count value of R is given by 1-x/y and a fraction of times that the counter is driven to a count value of R+1 is given by x/y.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: April 18, 2006
    Assignee: Hatteras Networks
    Inventor: Jerry Kyle Radcliffe
  • Methods, systems, and computer program products for deriving a signal from a clock signal using alternate ratio frequency division
    Publication number: 20030139913
    Abstract: A signal is generated by providing a clock signal having a frequency (fosc) The clock frequency fosc is arithmetically divided by an output frequency (fo) associated with the signal to obtain a ratio R and a remainder given by x/y. The signal is derived from the clock signal by successively dividing the frequency (fosc) of the clock signal by one of R and R+1, such that a fraction of times that the frequency (fosc) of the clock signal is divided by R is given by 1-x/y and a fraction of times that the frequency (fosc) of the clock signal is divided by R+1 is given by x/y. In particular, the signal is derived by driving a counter using the clock signal to a count value of one of R and R+1, such that a fraction of times that the counter is driven to a count value of R is given by 1-x/y and a fraction of times that the counter is driven to a count value of R+1 is given by x/y.
    Type: Application
    Filed: January 9, 2003
    Publication date: July 24, 2003
    Inventor: Jerry Kyle Radcliffe