Patents by Inventor Jerry Lutiva Tan

Jerry Lutiva Tan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230016380
    Abstract: According to one or more embodiments, a semiconductor package includes: a first semiconductor chip including an upper surface, a lower surface, and a side surface and including a chip pad provided on the upper surface; a first cover insulating layer covering the upper surface and the side surface of the first semiconductor chip; a first upper conductive layer extending along an upper surface of the first cover insulating layer and connected to the chip pad of the first semiconductor chip; a first side conductive layer extending along a side surface of the first cover insulating layer and connected to the first upper conductive layer; a second cover insulating layer covering the first upper conductive layer, the first side conductive layer, and the first cover insulating layer; and a first lower conductive layer extending along the lower surface of the first semiconductor chip and connected to the first side conductive layer.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 19, 2023
    Inventor: Jerry Lutiva TAN
  • Patent number: 7838973
    Abstract: A semi-conductor device (100) comprises an exposed leadframe (10) with a die pad (11) and a plurality of leads (12). The die pad (11) has a substantially flat bottom surface (14) and a top surface (15). A semi-conductor die (2) is attached to a die attachment portion (31) of the top surface (15). Downbonds (5) connect the die (2) to a downbond attachment portion (32). Standard bonds (4) connect the die (2) to the leads (12). A plastic package (6) encapsulates the die (2), the standard bonds (4) and the downbonds (5). The top surface of the die pad has portions located at different levels, and step-shaped transitions between two adjacent ones of such portions. At least one of such step-shaped transition (36) is located between the die (2) and the downbonds (5). It has been found that such step-shaped transition provides good protection against downbond failure.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: November 23, 2010
    Assignee: NXP B.V.
    Inventors: Jose Joel Dimasacat, Jerry Lutiva Tan, Willem Dirk Van Driel
  • Publication number: 20090152696
    Abstract: A semi-conductor device (100) comprises an exposed leadframe (10) with a die pad (11) and a plurality of leads (12). The die pad (11) has a substantially flat bottom surface (14) and a top surface (15). A semi-conductor die (2) is attached to a die attachment portion (31) of the top surface (15). Downbonds (5) connect the die (2) to a downbond attachment portion (32). Standard bonds (4) connect the die (2) to the leads (12). A plastic package (6) encapsulates the die (2), the standard bonds (4) and the downbonds (5). The top surface of the die pad has portions located at different levels, and step-shaped transitions between two adjacent ones of such portions. At least one of such step-shaped transition (36) is located between the die (2) and the downbonds (5). It has been found that such step-shaped transition provides good protection against downbond failure.
    Type: Application
    Filed: July 5, 2006
    Publication date: June 18, 2009
    Applicant: NXP B.V.
    Inventors: Jose Joel Dimasacat, Jerry Lutiva Tan, Willem Dirk Van Driel