Patents by Inventor Jerry M. Roane

Jerry M. Roane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7497807
    Abstract: A computer simulation enhanced exercise device is provided which engages the user by directly relating the users exercise motion in real time to a visual simulation or interactive game. The exercise device may comprise any variety of machines including, stationary bikes, rowing machines, treadmills, stepper, elliptical gliders or under desk exercise. These exercise devices are configured with sensors to measure physical movements as the user exercises and are coupled to computer hardware with modeling and virtualization software to create the system. These sensor measurements are then sent to a computer for use in the physics based modeling and real-time visual simulation. The computer simulation enhanced exercise device is further provided with features including manual and automatic adjustment of resistance levels, visualization of accurate caloric burn rates and correlation to everyday food items, and network connectivity providing for multiplayer network simulations and directed advertising.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: March 3, 2009
    Assignee: Cube X Incorporated
    Inventors: John D. Neff, Matthew T. Verona, Jerry M. Roane
  • Patent number: 7497812
    Abstract: A computer simulation enhanced exercise device is provided which engages the user by directly relating the users exercise motion in real time to a visual simulation or interactive game. The exercise device may comprise any variety of machines including, stationary bikes, rowing machines, treadmills, stepper, elliptical gliders or under desk exercise. These exercise devices are configured with sensors to measure physical movements as the user exercises and are coupled to computer hardware with modeling and virtualization software to create the system. These sensor measurements are then sent to a computer for use in the physics based modeling and real-time visual simulation. The computer simulation enhanced exercise device is further provided with features including manual and automatic adjustment of resistance levels, visualization of accurate caloric burn rates and correlation to everyday food items, and network connectivity providing for multiplayer network simulations and directed advertising.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: March 3, 2009
    Assignee: Cube X, Incorporated
    Inventors: John D. Neff, Matthew T. Verona, Jerry M. Roane
  • Patent number: 7334524
    Abstract: A rail system for transporting dual use vehicles includes a network of multiple non-interconnected rails where each rail comprises an extruded triangular shell and a support material. The rails are supported by a system of support structures where each support structure includes a base with a rail adjustment actuator for selectively adjusting the position of the supported rail. Each rail is sized to support a standardized dual use passenger vehicle adapted for roadway and rail travel.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: February 26, 2008
    Inventor: Jerry M. Roane
  • Patent number: 7127999
    Abstract: A rail system for transporting dual use vehicles includes a network of multiple non-interconnected rails where each rail comprises an extruded triangular shell and a support material. The rails are supported by a system of support structures where each support structure includes a base with a rail adjustment actuator for selectively adjusting the position of the supported rail. Each rail is sized to support a standardized dual use passenger vehicle adapted for roadway and rail travel.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 31, 2006
    Inventor: Jerry M. Roane
  • Patent number: 6923124
    Abstract: A rail system for transporting dual use vehicles includes a network of multiple non-interconnected rails where each rail comprises an extruded triangular shell and a support material. The rails are supported by a system of support structures where each support structure includes a base with a rail adjustment actuator for selectively adjusting the position of the supported rail. Each rail is sized to support a standardized dual use passenger vehicle adapted for roadway and rail travel.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: August 2, 2005
    Inventor: Jerry M. Roane
  • Publication number: 20040011242
    Abstract: A rail system for transporting dual use vehicles includes a network of multiple non-interconnected rails where each rail comprises an extruded triangular shell and a support material. The rails are supported by a system of support structures where each support structure includes a base with a rail adjustment actuator for selectively adjusting the position of the supported rail. Each rail is sized to support a standardized dual use passenger vehicle adapted for roadway and rail travel.
    Type: Application
    Filed: June 26, 2003
    Publication date: January 22, 2004
    Inventor: Jerry M. Roane
  • Patent number: 6194247
    Abstract: The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrated circuit package. To prevent the resulting ultra-thin integrated circuit package from warping, a thin layer of material with a coefficient of thermal expansion less than that of silicon is mounted to the upper major surface of the package after some of the casing material has been removed uniformly from the upper major surface. Also, a thin layer of material with a coefficient of thermal expansion greater than that of silicon may be mounted to the lower major surface of the package after some of the casing material has been removed uniformly from the lower major surface. The result is an ultra-thin integrated circuit package that is thermally and mechanically balanced to prevent warping.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: February 27, 2001
    Assignee: Staktek Group L.P.
    Inventors: Carmen D. Burns, James W. Cady, Jerry M. Roane, Phillip Randall Troetschel
  • Patent number: 5592364
    Abstract: The present invention includes a high density integrated circuit module which includes a plurality of stacked, individual integrated circuit devices wherein serpentine electrical interconnect rails connect electrical leads extending from the individual integrated circuit devices within the module.
    Type: Grant
    Filed: January 24, 1995
    Date of Patent: January 7, 1997
    Assignee: Staktek Corporation
    Inventor: Jerry M. Roane
  • Patent number: 5588205
    Abstract: The present invention includes a high density integrated circuit module which includes a plurality of stacked, individual integrated circuit devices wherein serpentine electrical interconnect rails connect electrical leads extending from the individual integrated circuit devices within the module.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: December 31, 1996
    Assignee: Staktek Corporation
    Inventor: Jerry M. Roane
  • Patent number: 5581121
    Abstract: The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrated circuit package. To prevent the resulting ultra-thin integrated circuit package from warping, a thin layer of material with a coefficient of thermal expansion less than that of silicon is mounted to the upper major surface of the package after some of the casing material has been removed uniformly from the upper major surface. Also, a thin layer of material with a coefficient of thermal expansion greater than that of silicon may be mounted to the lower major surface of the package after some of the casing material has been removed uniformly from the lower major surface. The result is an ultra-thin integrated circuit package that is thermally and mechanically balanced to prevent warping.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: December 3, 1996
    Assignee: Staktek Corporation
    Inventors: Carmen D. Burns, James W. Cady, Jerry M. Roane, Phillip R. Troetschel
  • Patent number: 5498906
    Abstract: The present invention provides capacitive and/or power supply decoupling for an integrated circuit package by utilizing an externally mounted bypass capacitor between power and ground. The bypass capacitor is mounted on internal leads projecting into a cove area formed at one or both ends of an integrated circuit package whereby one such internal lead is connected to the external power lead and the other such internal lead is connected to the external ground lead. A flexible, high-temperature adhesive material is used to secure the capacitor to the internal leads in the cove of the IC package so that when the package is later subject to soldering temperature thereby softening the solder connections between internal leads and the capacitor, the capacitor will not be electrically or physically disconnected from the internal leads. The adhesive secures the capacitor in place until the high temperatures dissipate and the solder joints between capacitor and the internal leads harden.
    Type: Grant
    Filed: November 17, 1993
    Date of Patent: March 12, 1996
    Assignee: Staktek Corporation
    Inventors: Jerry M. Roane, Carmen D. Burns
  • Patent number: 5475920
    Abstract: A method and apparatus for providing a multiple-element ultra high density level-two integrated circuit modular package utilizing a temporary manufacturing fixture to achieve a stack of individual thin ultra high density integrated circuit packages.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: December 19, 1995
    Inventors: Carmen D. Burns, Jerry M. Roane, James W. Cady
  • Patent number: 5369056
    Abstract: The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrated circuit package. To prevent the resulting ultra-thin integrated circuit package from warping, a thin layer of material with a coefficient of thermal expansion less than that of silicon is mounted to the upper major surface of the package after some of the casing material has been removed uniformly from the upper major surface. Also, a thin layer of material with a coefficient of thermal expansion greater than that of silicon may be mounted to the lower major surface of the package after some of the casing material has been removed uniformly from the lower major surface. The result is an ultra-thin integrated circuit package that is thermally and mechanically balanced to prevent warping.
    Type: Grant
    Filed: March 29, 1993
    Date of Patent: November 29, 1994
    Assignee: Staktek Corporation
    Inventors: Carmen D. Burns, James W. Cady, Jerry M. Roane, Phillip R. Troetschel
  • Patent number: 5369058
    Abstract: The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrated circuit package. To prevent the resulting ultra-thin integrated circuit package from warping, a thin layer of material with a coefficient of thermal expansion less than that of silicon is mounted to the upper major surface of the package after some of the casing material has been removed uniformly from the upper major surface. Also, a thin layer of material with a coefficient of thermal expansion greater than that of silicon may be mounted to the lower major surface of the package after some of the casing material has been removed uniformly from the lower major surface and after a layer of adhesive has been applied to the thin layer of material and cured.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: November 29, 1994
    Assignee: Staktek Corporation
    Inventors: Carmen D. Burns, James W. Cady, Jerry M. Roane, Philip R. Troetschel
  • Patent number: 5236117
    Abstract: A method and apparatus for tinning and soldering metal parts of electronic components and assemblies, and removing excess solder therefrom. The metal parts of the electronic components and assemblies are heated to a temperature near that of molten solder. A holding fixture, adapted to hold the heated components, slidably connects to an acceleration means which dips the metal parts of the components into the molten solder. Then acceleration energy is applied to the acceleration means, causing it to rapidly remove the components from the molten solder. Rapidly removing the components from the molten solder leaves excess solder behind, whereby all metal parts of the components are thoroughly tinned and soldered together without leaving unwanted solder bridges therebetween. A vibration means may also be used to prevent solder voids and promote solder wetting in densely packed leads and rails being tinned.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: August 17, 1993
    Assignee: Staktek Corporation
    Inventors: Jerry M. Roane, Carmen D. Burns