Patents by Inventor Jerry Mar

Jerry Mar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11970128
    Abstract: A sealed modular trim supplemental side air bag inflatable curtain (SABIC) module assembly includes a SABIC and a vehicle trim assembly encapsulating the SABIC. The SABIC is sealed within the vehicle trim assembly and provided as a complete compact module configured for subsequent attachment to a vehicle roll bar.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: April 30, 2024
    Assignee: FCA US LLC
    Inventors: William Mar, Alan R Kirby, Grant T Smith, Michael J Jarvis, Mark A Steinbach, Jerry Domulewicz
  • Patent number: 8292567
    Abstract: A stator assembly for a turbine engine is disclosed. The stator assembly has a stator support ring, a plurality of stator vanes protruding radially inwardly from the stator support ring, and at least one bleed port disposed on the stator support ring between at least two adjacent stator vanes of the plurality of stator vanes. The at least one bleed port defines an oblong profile having a first end terminating near a leading edge of a first stator vane of the at least two adjacent stator vanes, and a second end, substantially opposed from the first end, terminating near a trailing edge of a second stator vane of the at least two adjacent stator vanes. The profile may be concave toward a suction sidewall of the second stator vane of the at least two adjacent stator vanes.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: October 23, 2012
    Assignee: Caterpillar Inc.
    Inventors: Sachin V. Damle, Bachar Adjan, Jerry Mar Philip Fregoe
  • Publication number: 20090000306
    Abstract: A stator assembly for a turbine engine is disclosed. The stator assembly has a stator support ring, a plurality of stator vanes protruding radially inwardly from the stator support ring, and at least one bleed port disposed on the stator support ring between at least two adjacent stator vanes of the plurality of stator vanes. The at least one bleed port defines an oblong profile having a first end terminating near a leading edge of a first stator vane of the at least two adjacent stator vanes, and a second end, substantially opposed from the first end, terminating near a trailing edge of a second stator vane of the at least two adjacent stator vanes. The profile may be concave toward a suction sidewall of the second stator vane of the at least two adjacent stator vanes.
    Type: Application
    Filed: September 13, 2007
    Publication date: January 1, 2009
    Inventors: Sachin V. Damle, Bachar Adjan, Jerry Mar Philip Fregoe
  • Patent number: 4207615
    Abstract: A non-volatile MOS memory cell which includes a bistable (flip-flop) circuit with slightly imbalanced loads. An electrically programmable, floating gate device is coupled across a portion of one of the loads to permit selective shunting. When the cell is powered-down (such as at power failure), the floating gate is either charged or discharged as a function of the state of the flip-flop. When power is reapplied, the imbalance caused by the selective shunting forces the flip-flop to its previous state. The relatively small cell does not require resetting, and the stored information is returned in its true (non-complementary) form when the cell is reactivated.
    Type: Grant
    Filed: November 17, 1978
    Date of Patent: June 10, 1980
    Assignee: Intel Corporation
    Inventor: Jerry Mar
  • Patent number: 4203158
    Abstract: An electrically programmable and electrically erasable MOS memory device suitable for high density integrated circuit memories is disclosed. Carriers are tunneled between a floating conductive gate and a doped region in the substrate to program and erase the device. A minimum area of thin oxide (70 A-200 A) is used to separate this doped region from the floating gate. In one embodiment, a second layer of polysilicon is used to protect the thin oxide region during certain processing steps.
    Type: Grant
    Filed: December 15, 1978
    Date of Patent: May 13, 1980
    Assignee: Intel Corporation
    Inventors: Dov Frohman-Bentchkowsky, Jerry Mar, George Perlegos, William S. Johnson