Abstract: Embodiments can take brain activity measurement and decode into continuous language. Embodiment can use non-invasive brain recordings, such as functional magnetic resonance imaging (fMRI) and functional near-infrared spectroscopy (fNIRS) to detect changes in blood oxygen level that are coupled to neural activity. These brain recordings can be used by a language reconstruction model that involves a neural language model to predict a next word in a sequence and an encoding model to decode the recordings into continuous language, or sequences of words.

Abstract: A semiconductor package having various thermal dissipation features to dissipate heat. The semiconductor package may include an integrated circuit and a non-volatile storage device. Vias may be formed in the substrate and filled with a thermal conductive material. A pyrolytic graphite sheet overlays a top surface of the substrate and the vias. The pyrolytic graphite sheet defines one or more openings that enable the integrated circuit and the non-volatile storage device to be coupled to the top surface of the substrate. The integrated circuit is covered by another thermal conductive material such as a copper or silver paste. The copper or silver paste also covers a sidewall of the pyrolytic graphite sheet. The semiconductor package is enclosed by molding material and a metal layer. The pyrolytic graphite sheet connects the metal layer and the thermal conductive material overlaying the integrated circuit to form various thermal dissipation paths.

Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.

Abstract: A semiconductor device package includes a first substrate having an electrical circuit, semiconductor dies stacked one on top of the other, and bond wires electrically connected one to another. The bond wires electrically couple the semiconductor dies to one another and to the electrical circuit. There is a first bond wire having a first portion connected to a first semiconductor die, a second portion connected to a second semiconductor die, and an intermediate portion between the first portion and second portion. The semiconductor device package further includes a molding compound encapsulating the semiconductor dies, and the first and second portions of the first bond wire. The intermediate portion of the first bond wire is exposed along a top planar surface of the molding compound. The semiconductor device package may be used for coupling one or more other semiconductor device packages thereto via the exposed intermediate portion.

Abstract: A semiconductor device package includes a first substrate having an electrical circuit, semiconductor dies stacked one on top of the other, and bond wires electrically connected one to another. The bond wires electrically couple the semiconductor dies to one another and to the electrical circuit. There is a first bond wire having a first portion connected to a first semiconductor die, a second portion connected to a second semiconductor die, and an intermediate portion between the first portion and second portion. The semiconductor device package further includes a molding compound encapsulating the semiconductor dies, and the first and second portions of the first bond wire. The intermediate portion of the first bond wire is exposed along a top planar surface of the molding compound. The semiconductor device package may be used for coupling one or more other semiconductor device packages thereto via the exposed intermediate portion.

Abstract: A semiconductor device package includes a multi-layer substrate including a bottom layer and a top layer. One or more dies are mounted on and electrically coupled to the top layer of the substrate. An electromagnetic interference (EMI) shield encapsulates the substrate and the semiconductor dies. A first plurality of conductive stubs is positioned around edges of the top layer of the substrate. Each of the conductive stubs includes an edge portion having a first thickness and in contact with the EMI shield. A second plurality of conductive stubs is positioned around edges of the bottom layer of the substrate. Each of the second plurality of conductive stubs includes an edge portion having a second thickness less than the first thickness and in contact with the EMI shield.

Abstract: A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.

Abstract: A food preservation system and method comprise the use of at least one structure configured to be affixed to a food storage space, at least one microbe disposed on the at least one structure, and at least one container for sealing food in which the at least one structure and the at least one microbe are contained.

Abstract: A method for analyzing patent families. The method comprises: receiving a patent publication number; retrieving a family data set for the patent publication number, where the family data set includes a plurality of family member data sets, where each family member data set is related to the patent publication number and where each family member data set includes a publication number and country; storing the family data set; and graphically displaying a relationship between two or more of the plurality of family member data sets in the family data set.

Abstract: A method for analyzing patent flow. The method comprises: receiving a company set including an entity name; retrieving assignment data for the entity name, where the assignment data includes at least one assignment record having an assignor, an assignee, and a patent identifier associated with the assigner and the assignee, and where the entity name matches either the assignor or the assignee; storing the retrieved assignment data; and graphically displaying the relationship between each retrieved assignor and assignee in the assignment data.

Abstract: A method for analyzing cited references cited in a patent set comprising two or more patents. The method comprises: parsing each cited reference cited by each patent to determine a respective title of each respective cited reference; storing the title of each cited reference and the cited reference in a cited reference database, where the cited reference database links the respective title with the respective cited reference; counting the occurrence of each cited reference in the cited reference database; and displaying the title of the cited reference with the highest count.

Abstract: A memory controller and associated memory device having a universal serial bus (USB) interface thereon. The memory controller receives a USB instruction via the USB interface. After decoding the USB instruction, the memory controller controls the flow of data to and from a coupled memory unit. The memory unit may contain read-only-memory, one time programmable memory or static random access memory by selection.

Abstract: A flash memory bridging device, method and application system. The flash memory bridging device provides a buffer region that serves as a cache for storing the address of a portion of a NAND flash memory. A cache control logic inside the flash memory bridging device is used to determine if the requested data is a cache hit so that a direct response is possible or a cache miss so that waiting is demanded. During a data read operation, an error correction function is implemented so that data errors are corrected. Using NAND flash memory to simulate the operation of the NOR flash memory and store program code and data not only lowers production cost, but also improves overall performance and reliability of the system.

Abstract: The present invention provides for an improved automatic x-ray beam equalizer. By analyzing an initial low dosage x-ray image of an object, an attenuation pattern can be calculated. An equalization pattern, generated from the attenuation pattern, can then be created in a mask and placed in the path of a full x-ray beam scan using a stepper motor assembly in order to properly attenuate the x-ray signal and create a clearer x-ray image of the object.

Abstract: The present invention provides for an improved automatic x-ray beam equalizer. By analyzing an initial low dosage x-ray image of an object, an attenuation pattern can be calculated. An equalization pattern, generated from the attenuation pattern, can then be created in a mask and placed in the path of a full x-ray beam scan in order to properly attenuate the x-ray signal and create a clearer x-ray image of the object.