Patents by Inventor Jerwei Hsieh

Jerwei Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9676609
    Abstract: An integrated MEMS device is provided. The integrated MEMS device comprises a circuit chip and a device chip. The circuit chip has a patterned first bonding layer disposed thereon, the bonding layer being composed of a conductive material/materials. The device chip has a first structural layer and a second structural layer, the first structural layer being connected to the second structural layer and the first bonding layer of the circuit chip, and being sandwiched between the second structural layer and the circuit chip. A plurality of hermetic spaces are enclosed by the first structural layer, the second structural layer, the first bonding layer and the circuit chip.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: June 13, 2017
    Assignee: Asia Pacific Microsystems, Inc.
    Inventor: Jerwei Hsieh
  • Publication number: 20160244323
    Abstract: An integrated MEMS device is provided. The integrated MEMS device comprises a circuit chip and a device chip. The circuit chip has a patterned first bonding layer disposed thereon, the bonding layer being composed of a conductive material/materials. The device chip has a first structural layer and a second structural layer, the first structural layer being connected to the second structural layer and the first bonding layer of the circuit chip, and being sandwiched between the second structural layer and the circuit chip. A plurality of hermetic spaces are enclosed by the first structural layer, the second structural layer, the first bonding layer and the circuit chip.
    Type: Application
    Filed: May 3, 2016
    Publication date: August 25, 2016
    Inventor: Jerwei Hsieh
  • Patent number: 9359193
    Abstract: An integrated MEMS device and its manufacturing method are provided. In the manufacturing method, the sacrificial layer is used to integrate the MEMS wafer and the circuit wafer. The advantage of the present invention comprises preventing films on the circuit wafer from being damaged during process. By the manufacturing method, a mechanically and thermally stable structure material, for example: monocrystalline silicon and polysilicon, can be used. The integrated MEMS device manufactured can also possess the merit of planar top-surface topography with high fill factor. The manufacturing method is especially suitable for manufacturing MEMS array device.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: June 7, 2016
    Assignee: Asia Pacific Microsystems, Inc.
    Inventor: Jerwei Hsieh
  • Publication number: 20150274514
    Abstract: An integrated MEMS device and its manufacturing method are provided. In the manufacturing method, the sacrificial layer is used to integrate the MEMS wafer and the circuit wafer. The advantage of the present invention comprises preventing films on the circuit wafer from being damaged during process. By the manufacturing method, a mechanically and thermally stable structure material, for example: monocrystalline silicon and polysilicon, can be used. The integrated MEMS device manufactured can also possess the merit of planar top-surface topography with high fill factor. The manufacturing method is especially suitable for manufacturing MEMS array device.
    Type: Application
    Filed: January 28, 2014
    Publication date: October 1, 2015
    Applicant: Asia Pacific Microsystems, Inc.
    Inventor: Jerwei Hsieh
  • Patent number: 8916449
    Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 23, 2014
    Assignee: Asia Pacific Microsystems, Inc.
    Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
  • Publication number: 20130285248
    Abstract: A substrate bonding method comprises the following steps. Firstly, a first substrate and a second substrate are provided, wherein a surface of the first substrate is covered by a first Ag layer and a surface of the second substrate is covered by a second Ag layer and a metallic layer from bottom to top, wherein the metallic layer comprises a first Sn layer. Secondly, a bonding process is performed by aligning the first and second substrates followed by bringing the metallic layer into contact with the first Ag layer followed by applying a load while heating to a predetermined temperature in order to form Ag3Sn intermetallic compounds. Finally, cool down and remove the load to complete the bonding process.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 31, 2013
    Applicant: Asia Pacific Microsystems, Inc.
    Inventors: Hung-Lin Yin, Jerwei Hsieh, Li-Yuan Lin
  • Patent number: 7317575
    Abstract: A novel dispersion optical system based on at least one grating is provided. The pitches of the grating are linearly modulated so that the incident light is dispersed into different monochromatic light at different diffraction angles. In such a system, an order sorting filter is not required to separate the light of a selected order from the rest of unwanted overlapped order.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: January 8, 2008
    Assignee: Instrument Technology Research Center
    Inventors: Kuen-Wey Shieh, Jerwei Hsieh, Hsiao-yu Chou
  • Publication number: 20070286739
    Abstract: An apparatus for driving microfluids is provided. The apparatus comprises a driving unit and a microfluidic chip. The driving unit comprises a substrate and a film, wherein the film is combined with the substrate. Moreover, the microfluidic chip is coupled with the driving unit.
    Type: Application
    Filed: January 12, 2007
    Publication date: December 13, 2007
    Inventors: Jerwei Hsieh, Hung-Lin Yin
  • Publication number: 20070207063
    Abstract: A device for controlling a fluid sequence is provided. The device includes a base; at least a first fluid channel contained in the base and comprising a first end connected with at least an inlet tank, and a second end connected with at least an outlet tank; a plurality of valve elements contained in the at least a first fluid channel for dividing the at least a first fluid channel into several segments; a plurality of injecting tanks connected with the segments; and a plurality of exhaust tanks connected with the valve elements.
    Type: Application
    Filed: January 16, 2007
    Publication date: September 6, 2007
    Applicant: Instrument Technology Research Center National Applied Research Laboratories
    Inventor: Jerwei Hsieh
  • Patent number: 7247247
    Abstract: A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom portion of the lateral strengthening structure, and a part of the substrate by an etching process so as to form a lower structure and expose an unstrengthened structure; and (f) etching the unstrengthened structure laterally so as to form an upper structure.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: July 24, 2007
    Assignee: Walsin Lihwa Corporation
    Inventors: Jerwei Hsieh, Huai-Yuan Chu, Julius Ming-Lin Tsai, Weileun Fang
  • Patent number: 7180144
    Abstract: A corner-compensation method for fabricating MEMS (Micro-Electro-Mechanical System) is provided.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: February 20, 2007
    Assignee: Walsin Lihwa Corp.
    Inventors: Jerwei Hsieh, Weileun Fang
  • Patent number: 7088030
    Abstract: A high-aspect-ratio-microstructure (HARM) is provided. The structure includes: a substrate; a lower structure with a comb shape fixedly mounted on said substrate and having first plural comb fingers, wherein each of the first plural comb fingers has a thin slot thereon; an upper structure with a comb shape having second plural comb fingers, wherein the lower structure and the upper structure have a height difference therebetween so as to form an uneven surface; and a lateral strengthening structure formed at vertically peripheral walls of the first plural comb fingers and the second plural comb fingers for protecting the plural first and second comb fingers.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: August 8, 2006
    Assignee: Walsin Lihwa Corporation
    Inventors: Jerwei Hsieh, Huai-Yuan Chu, Julius Ming-Lin Tsai, Weileun Fang
  • Publication number: 20060169881
    Abstract: A novel dispersion optical system based on at least one grating is provided. The pitches of the grating are linearly modulated so that the incident light is dispersed into different monochromatic light at different diffraction angles. In such a system, an order sorting filter is not required to separate the light of a selected order from the rest of unwanted overlapped order.
    Type: Application
    Filed: July 14, 2005
    Publication date: August 3, 2006
    Inventors: Kuen-Wey Shieh, Jerwei Hsieh, Hsiao-yu Chou
  • Publication number: 20050224449
    Abstract: A corner-compensation method for fabricating MEMS (Micro-Electro-Mechanical System) is provided.
    Type: Application
    Filed: May 13, 2005
    Publication date: October 13, 2005
    Inventors: Jerwei Hsieh, Weileun Fang
  • Patent number: 6949396
    Abstract: A corner-compensation method for fabricating MEMS (Micro-Electro-Mechanical System) is provided.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: September 27, 2005
    Assignee: Walsin Lihwa Corp.
    Inventors: Jerwei Hsieh, Weileun Fang
  • Publication number: 20040232110
    Abstract: A selective etching method with lateral protection function is provided. The steps includes: (a) providing a substrate; (b) forming a plurality of tunnels; (c) forming a lateral strengthening structure at a peripheral wall of the tunnels; (d) removing a bottom portion of the lateral strengthening structure, and a part of the substrate by an etching process so as to form a lower structure and expose an unstrengthened structure; and (f) etching the unstrengthened structure laterally so as to form an upper structure.
    Type: Application
    Filed: May 6, 2004
    Publication date: November 25, 2004
    Applicant: Walsin Lihwa Corporation
    Inventors: Jerwei Hsieh, Huai-Yuan Chu, Julius Ming-Lin Tsai, Weileun Fang
  • Publication number: 20040232502
    Abstract: A high-aspect-ratio-microstructure (HARM) is provided. The structure includes: a substrate; a lower structure with a comb shape fixedly mounted on said substrate and having first plural comb fingers, wherein each of the first plural comb fingers has a thin slot thereon; an upper structure with a comb shape having second plural comb fingers, wherein the lower structure and the upper structure have a height difference therebetween so as to form an uneven surface; and a lateral strengthening structure formed at vertically peripheral walls of the first plural comb fingers and the second plural comb fingers for protecting the plural first and second comb fingers.
    Type: Application
    Filed: May 6, 2004
    Publication date: November 25, 2004
    Applicant: Walsin Lihwa Corporation
    Inventors: Jerwei Hsieh, Huai-Yuan Chu, Julius Ming-Lin Tsai, Weileun Fang
  • Publication number: 20040097001
    Abstract: A corner-compensation method for fabricating MEMS (Micro-Electro-Mechanical System) is provided.
    Type: Application
    Filed: July 1, 2002
    Publication date: May 20, 2004
    Applicant: Walsin Lihwa Corp.
    Inventors: Jerwei Hsieh, Weileun Fang