Patents by Inventor Jerzy Nabielec

Jerzy Nabielec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9356720
    Abstract: A method for synchronization and transmission of information in a distributed measurement and control system, wherein frames, being a sequence of bits, are transmitted between a master node (M) and a slave node (S), the method comprising cyclically performing the steps of: receiving (101) at the master node (M) an echo frame sent from the slave node (S) as an echo of the last frame received by the slave node (S) from the master node (M); determining (102) the time of frame propagation between sending the frame from the master node (M) and receiving the echo frame at the master node (M); constructing (103) a subsequent frame at the master node (M), the subsequent frame comprising a data field comprising a time adjustment dependent on the determined time of frame propagation; sending (104) the subsequent frame from the master node (M) to the slave node (S); receiving (105) the subsequent frame at the slave node (S); and adjusting (106) a timer (S_T) of the slave node (S) depending on the value of the time adjus
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: May 31, 2016
    Assignee: AKADEMIA GORNICZO-HUTNICZA IM. STANISLAWA STASZICA W KRAKOWIE
    Inventors: Jerzy Nabielec, Andrzej Wetula
  • Patent number: 9331662
    Abstract: An adaptive voltage divider for measuring a high voltage between a ground terminal (GND) and a measurement terminal (U). It comprises a first branch comprising a first set of impedance elements (Z, R) forming a voltage divider circuit connected between the ground terminals (GND) and the measurement terminal (U) and a voltage meter (AD2) configured to measure voltage on one of the impedance elements (Z, R) of the first branch. Furthermore, it comprises a second branch comprising a second set of impedance elements (Q, P) connected between the ground terminal (GND) and the measurement terminal (U) and switchable between a plurality of configurations, wherein in at least one configuration the second set of impedance elements (Q, P) forms a voltage divider circuit, and voltage meters (AD1, AD3) configured to measure voltage on at least one of the impedance elements (Q, P) of the second branch.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: May 3, 2016
    Assignee: AKADEMIA GORNICZO-HUTNICZA IM. STANISLAWA STASZICA W KRAKOWIE
    Inventor: Jerzy Nabielec
  • Publication number: 20140177655
    Abstract: A method for synchronization and transmission of information in a distributed measurement and control system, wherein frames, being a sequence of bits, are transmitted between a master node (M) and a slave node (S), the method comprising cyclically performing the steps of: receiving (101) at the master node (M) an echo frame sent from the slave node (S) as an echo of the last frame received by the slave node (S) from the master node (M); determining (102) the time of frame propagation between sending the frame from the master node (M) and receiving the echo frame at the master node (M); constructing (103) a subsequent frame at the master node (M), the subsequent frame comprising a data field comprising a time adjustment dependent on the determined time of frame propagation; sending (104) the subsequent frame from the master node (M) to the slave node (S); receiving (105) the subsequent frame at the slave node (S); and adjusting (106) a timer (S_T) of the slave node (S) depending on the value of the time adjus
    Type: Application
    Filed: December 19, 2013
    Publication date: June 26, 2014
    Applicant: AKADEMIA GORNICZO-HUTNICZA IM. STANISLAWA STASZICA W KRAKOWIE
    Inventors: Jerzy NABIELEC, Andrzej Wetula
  • Publication number: 20140159701
    Abstract: An adaptive voltage divider for measuring a high voltage between a ground terminal (GND) and a measurement terminal (U). It comprises a first branch comprising a first set of impedance elements (Z, R) forming a voltage divider circuit connected between the ground terminals (GND) and the measurement terminal (U) and a voltage meter (AD2) configured to measure voltage on one of the impedance elements (Z, R) of the first branch. Furthermore, it comprises a second branch comprising a second set of impedance elements (Q, P) connected between the ground terminal (GND) and the measurement terminal (U) and switchable between a plurality of configurations, wherein in at least one configuration the second set of impedance elements (Q, P) forms a voltage divider circuit, and voltage meters (AD1, AD3) configured to measure voltage on at least one of the impedance elements (Q, P) of the second branch.
    Type: Application
    Filed: August 17, 2012
    Publication date: June 12, 2014
    Inventor: Jerzy Nabielec