Patents by Inventor Jesús Bonache Martinez

Jesús Bonache Martinez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230283251
    Abstract: A capacitive amplifier device and technique for mitigating the perturbation within the switchable terminals of a feedback capacitor which is produced by the switching activity performed as part of the device's operation. The capacitive amplifier contains feedback components which can be switched without producing significant kickback or poorly behaved transitions due to the inclusion of at least one dedicated circuit. The dedicated circuit is a kickback limiter circuitry which is connected to a switchable node and is designed to reduce the kickback. The technique for reducing the kickback produced can be achieved by connecting and activating the kickback limiter circuitry.
    Type: Application
    Filed: March 1, 2022
    Publication date: September 7, 2023
    Inventors: Gerard Mora-Puchalt, Italo Carlos Medina Sánchez Castro, Jesús Bonache Martinez
  • Patent number: 11664814
    Abstract: Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: May 30, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Gerard Mora Puchalt, Italo Carlos Medina Sánchez Castro, Jesús Bonache Martinez
  • Patent number: 11658655
    Abstract: A circuit may include or may be coupled to a precharge structure to reduce or minimize a net perturbation, caused by switching, in the input source. Apparatus and techniques shown herein may enable low input current operation in a signal chain of an analog circuit by such reduction or minimization of such perturbation.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: May 23, 2023
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jesús Bonache Martínez, Italo Carlos Medina Sánchez Castro
  • Publication number: 20230064761
    Abstract: Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Gerard Puchalt, Italo Carlos Medina Sánchez Castro, Jesús Bonache Martinez
  • Publication number: 20220416781
    Abstract: A circuit may include or may be coupled to a precharge structure to reduce or minimize a net perturbation, caused by switching, in the input source. Apparatus and techniques shown herein may enable low input current operation in a signal chain of an analog circuit by such reduction or minimization of such perturbation.
    Type: Application
    Filed: April 15, 2022
    Publication date: December 29, 2022
    Inventors: Jesús Bonache Martinez, Italo Carlos Medina Sánchez Castro