Abstract: A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: An access determination management system obtains information regarding various different entities in a system (e.g., a networked environment) and what rights or privileges those entities have. An entity, also referred to herein as a principal, can be a user, a computing device, a group of users, a group of computing devices, or a service. The rights or privileges that an entity has includes, for example, whether administrative privileges are available to the entity, whether a particular program can be executed, whether an entity is a member of another entity, and so forth. The access determination management system uses the obtained information to generate and display a graph of the environment. The graph of the environment includes the different objects as well as links between the objects that indicate rights or privileges one object has with respect to another.

Abstract: A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: An access determination management system obtains information regarding various different entities in a system (e.g., a networked environment) and what rights or privileges those entities have. An entity, also referred to herein as a principal, can be a user, a computing device, a group of users, a group of computing devices, or a service. The rights or privileges that an entity has includes, for example, whether administrative privileges are available to the entity, whether a particular program can be executed, whether an entity is a member of another entity, and so forth. The access determination management system uses the obtained information to generate and display a graph of the environment. The graph of the environment includes the different objects as well as links between the objects that indicate rights or privileges one object has with respect to another.

Abstract: An access determination management system obtains information regarding various different entities in a system (e.g., a networked environment) and what rights or privileges those entities have. An entity, also referred to herein as a principal, can be a user, a computing device, a group of users, a group of computing devices, or a service. The rights or privileges that an entity has includes, for example, whether administrative privileges are available to the entity, whether a particular program can be executed, whether an entity is a member of another entity, and so forth. The access determination management system uses the obtained information to generate and display a graph of the environment. The graph of the environment includes the different objects as well as links between the objects that indicate rights or privileges one object has with respect to another.

Abstract: An external charger for a battery in an implantable medical device and charging techniques are disclosed. Simulation data is used to model the power dissipation of the charging circuitry in the implant at varying levels of implant power. A power dissipation limit constrains the charging circuitry from producing an inordinate amount of heat to the tissue surrounding the implant, and duty cycles of a charging field are determined so as not to exceed that limit. A maximum simulated average battery current determines the optimal (i.e., quickest) battery charging current, and at least an optimal value for a parameter indicative of that current is determined and stored in the external charger. During charging, the actual value for that parameter is determined, and the intensity and/or duty cycle of the charging field are adjusted to ensure that charging is as fast as possible, while still not exceeding the power dissipation limit.

Abstract: An access determination management system obtains information regarding various different entities in a system (e.g., a networked environment) and what rights or privileges those entities have. An entity, also referred to herein as a principal, can be a user, a computing device, a group of users, a group of computing devices, or a service. The rights or privileges that an entity has includes, for example, whether administrative privileges are available to the entity, whether a particular program can be executed, whether an entity is a member of another entity, and so forth. The access determination management system uses the obtained information to generate and display a graph of the environment. The graph of the environment includes the different objects as well as links between the objects that indicate rights or privileges one object has with respect to another.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: An external charger for a battery in an implantable medical device and charging techniques are disclosed. Simulation data is used to model the power dissipation of the charging circuitry in the implant at varying levels of implant power. A power dissipation limit constrains the charging circuitry from producing an inordinate amount of heat to the tissue surrounding the implant, and duty cycles of a charging field are determined so as not to exceed that limit. A maximum simulated average battery current determines the optimal (i.e., quickest) battery charging current, and at least an optimal value for a parameter indicative of that current is determined and stored in the external charger. During charging, the actual value for that parameter is determined, and the intensity and/or duty cycle of the charging field are adjusted to ensure that charging is as fast as possible, while still not exceeding the power dissipation limit.

Abstract: Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: An external charger for a battery in an implantable medical device and charging techniques are disclosed. Simulation data is used to model the power dissipation of the charging circuitry in the implant at varying levels of implant power. A power dissipation limit constrains the charging circuitry from producing an inordinate amount of heat to the tissue surrounding the implant, and duty cycles of a charging field are determined so as not to exceed that limit. A maximum simulated average battery current determines the optimal (i.e., quickest) battery charging current, and at least an optimal value for a parameter indicative of that current is determined and stored in the external charger. During charging, the actual value for that parameter is determined, and the intensity and/or duty cycle of the charging field are adjusted to ensure that charging is as fast as possible, while still not exceeding the power dissipation limit.

Abstract: An external charger for a battery in an implantable medical device (implant), and technique for charging batteries in multiple implants using such improved external charger, is disclosed. During charging, values for a parameter measured in the implants are reported from the implants to the external charger. The external charger infers from the magnitudes of the parameters which of the implants has the highest (hot) and lowest (cold) coupling to the external charger. The intensity of the magnetic charging field is optimized for the cold implant to ensure that it is charged with a maximum (fastest) battery charging current. The duty cycle of the magnetic charging field is also optimized for the hot implant to ensure that it does not exceed a power dissipation limit. As a result, charging is optimized to be fast for all of the implants, while still safe from a tissue heating perspective.