Patents by Inventor Jesse Chai

Jesse Chai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060117156
    Abstract: An apparatus and method for dual protection of a protected memory block (110) includes protected memory block (110) in a memory module (106), where the memory module is non-volatile and block-based. A memory controller (102) is coupled to access the protected memory block on the memory module, while a logic module (104) is coupled to and interposed between the memory controller and the memory module. The logic module is coupled to detect a hardware state (114) of a hardware source (108), and coupled to receive a write-protect signal (116) from the memory controller. If the logic module detects the hardware state as a write permit state (118) and the logic module fails to receive the write-protect signal (116), the logic module permits the memory controller to modify the protected memory block. If the logic module either detects the hardware state is a write non-permit state (120) or receives the write-protect signal, the logic module prevents the memory controller from modifying the protected memory block.
    Type: Application
    Filed: December 1, 2004
    Publication date: June 1, 2006
    Inventors: Jesse Chai, Matthew Meyer
  • Publication number: 20060060380
    Abstract: A printed circuit board (100) includes a first BGA landing pad (102) having a first clearance zone (106) and a second BGA landing pad (104) having a second clearance zone (108). A via (110), overlaps the first clearance zone and the second clearance zone such that the first BGA landing pad and the second BGA landing pad are electrically coupled to the via.
    Type: Application
    Filed: September 23, 2004
    Publication date: March 23, 2006
    Inventors: Matthew Meyer, Jesse Chai, Paul Roosen, Robert Young