Patents by Inventor Jesse J. Kramer

Jesse J. Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6340796
    Abstract: A printed wiring board structure having at least one chip-carrying layer adjacent a core fabricated of a metal matrix having disposed therein continuous pitch based graphite fibers. The chip carrying layers and the core have an interface therebetween and are integrally connected to each other through vias plated with an electrically and thermally conductive material to thereby provide a plurality of connection sites along this interface. The matrix is preferably fabricated of aluminum. Preferred fibers are fabricated of pitch based graphite. A substantial weight savings over a common molybdenum core printed wiring board is realized due to the significant reduction in density of the core material.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: January 22, 2002
    Assignee: Northrop Grumman Corporation
    Inventors: Carl R. Smith, Jeffrey R. Madura, Jesse J. Kramer
  • Patent number: 6207904
    Abstract: A printed wiring board structure having at least one chip-carrying layer adjacent a core fabricated of an organic matrix having disposed therein continuous pitch based graphite fibers. The chip carrying layers and the core have an interface therebetween and are integrally connected to each other through vias plated with an electrically and thermally conductive material to thereby provide a plurality of connection sites along this interface. An organic matrix is preferably fabricated of a polymer material such as an epoxy resin. Preferred fibers are fabricated of pitch based graphite. A typically preferred present printed wiring board structure has several circuit layers and two chip-carrying layers each on opposite sides of the core, with each of the layers and the core having respective interfaces therebetween wherein each layer is integrally connected to the core at a plurality of connection sites, as required by circuit design, along the respective interfaces.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: March 27, 2001
    Assignee: Northrop Grumman Corporation
    Inventors: Jesse J. Kramer, Jeffrey R. Madura, Carl Richard Smith