Patents by Inventor Jessica M. DECHENE

Jessica M. DECHENE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240030059
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to single diffusion cut for gate structures and methods of manufacture. The structure includes a single diffusion break extending into a substrate between diffusion regions of adjacent gate structures, the single diffusion break filled with an insulator material and further comprising an undercut region lined with a liner material which is between the insulator material and the diffusion regions.
    Type: Application
    Filed: October 4, 2023
    Publication date: January 25, 2024
    Inventors: Hui ZANG, Ruilong XIE, Jessica M. DECHENE
  • Patent number: 11810812
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to single diffusion cut for gate structures and methods of manufacture. The structure includes a single diffusion break extending into a substrate between diffusion regions of adjacent gate structures, the single diffusion break filled with an insulator material and further comprising an undercut region lined with a liner material which is between the insulator material and the diffusion regions.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: November 7, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Hui Zang, Ruilong Xie, Jessica M. Dechene
  • Publication number: 20210351068
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to single diffusion cut for gate structures and methods of manufacture. The structure includes a single diffusion break extending into a substrate between diffusion regions of adjacent gate structures, the single diffusion break filled with an insulator material and further comprising an undercut region lined with a liner material which is between the insulator material and the diffusion regions.
    Type: Application
    Filed: July 22, 2021
    Publication date: November 11, 2021
    Inventors: Hui ZANG, Ruilong XIE, Jessica M. DECHENE
  • Patent number: 11127623
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to single diffusion cut for gate structures and methods of manufacture. The structure includes a single diffusion break extending into a substrate between diffusion regions of adjacent gate structures, the single diffusion break filled with an insulator material and further comprising an undercut region lined with a liner material which is between the insulator material and the diffusion regions.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: September 21, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Hui Zang, Ruilong Xie, Jessica M. Dechene
  • Publication number: 20200185266
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to single diffusion cut for gate structures and methods of manufacture. The structure includes a single diffusion break extending into a substrate between diffusion regions of adjacent gate structures, the single diffusion break filled with an insulator material and further comprising an undercut region lined with a liner material which is between the insulator material and the diffusion regions.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 11, 2020
    Inventors: Hui ZANG, Ruilong XIE, Jessica M. DECHENE