Patents by Inventor Jesus F. SANCHEZ

Jesus F. SANCHEZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210244031
    Abstract: The present invention provides a composition comprising a biologically pure culture of a Paenibacillus sp. strain comprising a mutant DegU lacking a functional receiver domain or a functional DNA binding domain and/or a mutant DegS lacking a functional single binding domain or a functional ATPase domain with decreased viscosity in a liquid culture. Also provided is a method of identifying a Paenibacillus sp. mutant derivative strain with decreased viscosity in a liquid culture compared to a Paenibacillus sp. parental strain with a visual screen for mutant isolates with a non-mucoid morphology.
    Type: Application
    Filed: May 8, 2019
    Publication date: August 12, 2021
    Inventors: Jennifer Anne COLLINS, Jesus F. SANCHEZ, James L. WALLER, Bjorn A. TRAAG, Sara K. HOTTON, Tony J. TEGELER
  • Publication number: 20190138303
    Abstract: An apparatus and method are described for performing vector horizontal logical instruction. For example, one embodiment of a processor comprises: fetch logic to fetch an instruction from memory, and execution logic to determine a value of a first set of one or more data elements from a first specified set of bits of an immediate operand, wherein positions of the first set of one or more data elements determined from the first specified set of bits of the immediate operand are based on a first set of one or more index values that have a most significant bit corresponding to a packed data element at a first set of one or more positions of a destination packed data operand and that have a least significant bit corresponding to a data element at a corresponding position of a first source packed data operand.
    Type: Application
    Filed: August 23, 2018
    Publication date: May 9, 2019
    Inventors: Elmoustapha OULD-AHMED-VALL, David GUILLEN FANDOS, Jesus F. SANCHEZ, Guillem SOLE, Roger ESPASA
  • Publication number: 20160283242
    Abstract: An apparatus and method are described for performing vector horizontal logical instruction. For example, one embodiment of a processor comprises: fetch logic to fetch an instruction from memory, and execution logic to determine a value of a first set of one or more data elements from a first specified set of bits of an immediate operand, wherein positions of the first set of one or more data elements determined from the first specified set of bits of the immediate operand are based on a first set of one or more index values that have a most significant bit corresponding to a packed data element at a first set of one or more positions of a destination packed data operand and that have a least significant bit corresponding to a data element at a corresponding position of a first source packed data operand.
    Type: Application
    Filed: December 23, 2014
    Publication date: September 29, 2016
    Inventors: Elmoustapha OULD-AHMED-VALL, David GUILLEN FANDOS, Jesus F. SANCHEZ, Guillem SOLE, Roger ESPASA
  • Publication number: 20160179523
    Abstract: An apparatus and method are described for performing a vector broadcast and XORAND logical instruction. For example, one embodiment of a processor comprises: fetch logic to fetch an instruction from memory indicating a destination packed data operand, a first source packed data operand, a second source packed data operand, and an immediate operand, and execution logic to determine a bit in the second source packed data operand based a position corresponding to the immediate value, perform a bitwise AND between the first source packed data operand and the determined bit to generate an intermediate result, perform a bitwise XOR between the destination packed data operand and the intermediate result to generate a final result, and store the final result in a storage location indicated by the destination packed data operand.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Elmoustapha OULD-AHMED-VALL, David GUILLEN FANDOS, Jesus F. SANCHEZ, Guillem SOLE, Roger ESPASA