Abstract: The present invention provides a timing recovery technique for baseband-coded data sequences which applies to line codes with inband timing information embedded in periodic signal transitions, such as zero-crossings. The technique utilizes a selection of data patterns, like mark-to-mark, which have zero-crossings at the "center" of a transition from a positive to negative mark. These so-called "bipolar patterns" consist of two polar-signals of opposite polarity sharing neighborly baud intervals. Because the random nature of a data sequence gives timing information a statistical behavior, a timing recovery system recovers a timing average, the efficiency of the system being given in terms of the timing variance. According to the present invention, a low variance estimate for the bipolar-pattern-center timing signal is obtained by proper filtering.

Abstract: A quotient phase-shift processor is provided which includes novel techniques for realizing phase corrections of a digital phase-locked-loop. A binary phase-detector of the "early-late" type is combined with range-phase-detector circuitry to generate a variable lock acquisition speed. Phase measure and speed control are performed by incremental manipulation which feeds a novel "quotient" processor. The quotient processor integrates the incremental phase errors and performs phase corrections in a nonperiodic fashion, resulting in lower effective proportional loop gain than that provided in standard phase-locked-loops. Wide capture-range and low jitter are obtained by dynamically varying a loop time constant. Pattern dependent noise is reduced by a novel gating technique. High crystal-frequency requirements are reduced, extending the spectral application of digital phase-locked-loops.