Abstract: A tuning circuit (202) uses a precision current reference (Iref) along with an analog-to-digital converter (218) to produce a digital output (228) to represent variations of internal resistance values. The precision current reference (Iref) is fed to an internal tuning resistor (R210) in order to provide an analog voltage signal to the analog-to-digital converter (218). The analog voltage signal changes in accordance with the variations in the tuning resistor value over process and temperature. The digital output (228) controls programmable capacitor arrays (C220, C222) which are included in the tuning circuit (202) as well as in an active RC filter (208) whose bandwidth is controlled by the programmable capacitor arrays (C220, C222) and internal resistors (R212, R214, R216).

Abstract: A DC translation circuit (200) provides maximum dynamic range in DC level shifting that is temperature and process invariant. The DC translation circuit (200) includes a bandgap reference (202) and current mirror circuit (204) for providing a reference current, Iref. An op-amp circuit (210) receives an AC signal centered about a first DC level, and translates the first DC level into a second DC level using the reference current, a current mirror circuit (208), op-amp circuit (210) and resistor (R2).